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integratION

  • LPC1769 LPC1768 LPC1767 LPC176

    The LPC1769/68/67/66/65/64 are ARM Cortex-M3 based microcontrollers for embedded applications featuring a high level of integratION and low power consumption. The ARM Cortex-M3 is a next generation core that offers system enhancements such as enhanced debug features and a higher level of support block integratION.

    標簽: LPC 1769 1768 1767

    上傳時間: 2014-02-20

    上傳用戶:13215175592

  • HCS12微控制器MC9S12DP256使用指南 ppt

    HCS12微控制器MC9S12DP256 第一步: 1) HCS12 技術概述2) Operating Modes工作模式3) Resource  Mapping資源映射4) External Bus Interface外部總線接口5) Port integratION Module端口集成模塊6) Background Debug Mode背景調試模塊

    標簽: 12 HCS 256 MC9

    上傳時間: 2013-12-20

    上傳用戶:源碼3

  • winCE msdn講座

    winCE msdn講座 XP Embedded Now and the future Windows XP Embedded Developmentand Deployment Model OverviewWindows XP Embedded Component ModelWindows XP Embedded Studio Tools Microsoft WindowsXP Embedded Product Highlights Componentized version of Windows XP Professional~ 12,000 components and updates as of Service Pack 2Flexible localizationSame binaries and API as Windows XP ProfessionalHotfixes and service packsEmbedded Enabling FeaturesRuns on standard PC hardwareSupports boot on hard drives, compact flash, DiskOnChipand read-only mediaSupport for remote install and remote bootHeadless device and remote management supportintegratION with Microsoft management tools

    標簽: winCE msdn 講座

    上傳時間: 2013-10-31

    上傳用戶:jrsoft

  • Xilinx UltraScale:新一代架構滿足您的新一代架構需求(EN)

      中文版詳情瀏覽:http://www.elecfans.com/emb/fpga/20130715324029.html   Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture    The Xilinx® UltraScale™ architecture delivers unprecedented levels of integratION and capability with ASIC-class system- level performance for the most demanding applications.   The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation.   Some of the UltraScale architecture breakthroughs include:   • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50%    • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability   • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization   • 3D IC integratION makes it possible to build larger devices one process generation ahead of the current industr y standard    • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets   • Greatly enhanced DSP and packet handling   The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.

    標簽: UltraScale Xilinx 架構

    上傳時間: 2013-11-13

    上傳用戶:瓦力瓦力hong

  • 《器件封裝用戶向導》賽靈思產品封裝資料

    Introduction to Xilinx Packaging Electronic packages are interconnectable housings for semiconductor devices. The major functions of the electronic packages are to provide electrical interconnections between the IC and the board and to efficiently remove heat generated by the device. Feature sizes are constantly shrinking, resulting in increased number of transistors being packed into the device. Today's submicron technology is also enabling large-scale functional integratION and system-on-a-chip solutions. In order to keep pace with these new advancements in silicon technologies, semiconductor packages have also evolved to provide improved device functionality and performance. Feature size at the device level is driving package feature sizes down to the design rules of the early transistors. To meet these demands, electronic packages must be flexible to address high pin counts, reduced pitch and form factor requirements. At the same time,packages must be reliable and cost effective.

    標簽: 封裝 器件 用戶 賽靈思

    上傳時間: 2013-10-22

    上傳用戶:ztj182002

  • WP151 - Xilinx FPGA的System ACE配置解決方案

    Design techniques for electronic systems areconstantly changing. In industries at the heart of thedigital revolution, this change is especially acute.Functional integratION, dramatic increases incomplexity, new standards and protocols, costconstraints, and increased time-to-market pressureshave bolstered both the design challenges and theopportunities to develop modern electronic systems.One trend driving these changes is the increasedintegratION of core logic with previously discretefunctions to achieve higher performance and morecompact board designs.

    標簽: System Xilinx FPGA 151

    上傳時間: 2014-12-28

    上傳用戶:康郎

  • WP196-平面顯示器中的Xilinx器件

      According to CIBC World Markets, Equity Research, theFlat Panel Display (FPD) industry has achieved sufficientcritical mass for its growth to explode. Thus, it can nowattract the right blend of capital investments and R&Dresources to drive technical innovation toward continuousimprovement in view quality, manufacturing efficiency,and system integratION. These in turn are sustainingconsumer interest, penetration, revenue growth, and thepotential for increasing long-term profitability for industryparticipants. CIBC believes that three essential conditionsare now converging to drive the market forward

    標簽: Xilinx 196 WP 平面顯示器

    上傳時間: 2013-10-18

    上傳用戶:日光微瀾

  • WP312-Xilinx新一代28nm FPGA技術簡介

    Xilinx Next Generation 28 nm FPGA Technology Overview Xilinx has chosen 28 nm high-κ metal gate (HKMG) highperformance,low-power process technology and combined it with a new unified ASMBL™ architecture to create a new generation of FPGAs that offer lower power and higher performance. These devices enable unprecedented levels of integratION and bandwidth and provide system architects and designers a fully programmable alternative to ASSPs and ASICs.

    標簽: Xilinx FPGA 312 WP

    上傳時間: 2014-12-28

    上傳用戶:zhang97080564

  • WP369可擴展式處理平臺-各種嵌入式系統的理想解決方案

    WP369可擴展式處理平臺-各種嵌入式系統的理想解決方案 :Delivering unrivaled levels of system performance,flexibility, scalability, and integratION to developers,Xilinx's architecture for a new Extensible Processing Platform is optimized for system power, cost, and size. Based on ARM's dual-core Cortex™-A9 MPCore processors and Xilinx’s 28 nm programmable logic,the Extensible Processing Platform takes a processor-centric approach by defining a comprehensive processor system implemented with standard design methods. This approach provides Software Developers a familiar programming environment within an optimized, full featured,powerful, yet low-cost, low-power processing platform.

    標簽: 369 WP 擴展式 處理平臺

    上傳時間: 2013-10-22

    上傳用戶:685

  • FPGA設計重利用方法(Design Reuse Methodology)

      FPGAs have changed dramatically since Xilinx first introduced them just 15 years ago. In thepast, FPGA were primarily used for prototyping and lower volume applications; custom ASICswere used for high volume, cost sensitive designs. FPGAs had also been too expensive and tooslow for many applications, let alone for System Level integratION (SLI). Plus, the development

    標簽: Methodology Design Reuse FPGA

    上傳時間: 2013-10-23

    上傳用戶:旗魚旗魚

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