The field of digital communication has evolved rapidly in the past few decades, with commercial applications proliferating in wireline communi- cation networks (e.g., digital subscriber loop, cable, fiber optics), wireless communication (e.g., cell phones and wireless local area networks), and stor- age media (e.g., compact discs, hard drives). The typical undergraduate and graduate student is drawn to the field because of these applications, but is often intimidated by the mathematical background necessary to understand communication theory.
標簽： Communication Fundamentals Digital of
上傳時間： 2020-05-27
上傳用戶：shancjb
Public telephone operators and new independent wireless operators through- out the world are deploying wireless access in an effort to drastically reduce delivery costs in the most expensive part of the network?the local loop. Available radio technology enables both existing and new entrants to access subscribers in a rapid manner and deliver their basic telephony products and broadband-enhanced services.
標簽： Transmission Handbooks Systems Design
上傳時間： 2020-06-01
上傳用戶：shancjb
PLL(Phase Locked loop)： 為鎖相回路或鎖相環，用來統一整合時鐘信號，使高頻器件正常工作，如內存的存取資料等。PLL用于振蕩器中的反饋技術。 許多電子設備要正常工作，通常需要外部的輸入信號與內部的振蕩信號同步。一般的晶振由于工藝與成本原因，做不到很高的頻率，而在需要高頻應用時，由相應的器件VCO，實現轉成高頻，但并不穩定，故利用鎖相環路就可以實現穩定且高頻的時鐘信號。
上傳時間： 2021-07-23
上傳用戶：紫陽帝尊
Wherever possible the overall technique used for this series will be "definition by example" withgeneric formulae included for use in other applications. To make stability analysis easy we will usemore than one tool from our toolbox with data sheet information, tricks, rules-of-thumb, SPICESimulation, and real-world testing all accelerating our design of stable operational amplifier (op amp)circuits. These tools are specifically targeted at voltage feedback op amps with unity-gain bandwidths<20 MHz, although many of the techniques are applicable to any voltage feedback op amp. 20 MHz ischosen because as we increase to higher bandwidth circuits there are other major factors in closing theloop: such as parasitic capacitances on PCBs, parasitic inductances in capacitors, parasitic inductancesand capacitances in resistors, etc. Most of the rules-of-thumb and techniques were developed not justfrom theory but from the actual building of real-world circuits with op amps <20 MHz.
標簽： 運算放大器
上傳時間： 2021-11-01
上傳用戶：
ADC模數轉換器件Altium Designer AD原理圖庫元件庫SV text has been written to file : 4.4 - ADC模數轉換器件.csvLibrary Component Count : 29Name Description----------------------------------------------------------------------------------------------------ADC0800 National 8-Bit Analog to Digital ConverterADC0809 ADC0831 ADCADC0832 ADC8 Generic 8-Bit A/D ConverterCLC532 High-Speed 2:1 Analog MultiplexerCS5511 National 16-Bit Analog to Digital ConverterDAC8 Generic 8-Bit D/A ConverterEL1501 Differential line Driver/ReceiverEL2082 Current-Mode MultiplierEL4083 Current Mode Four Quadrant MultiplierEL4089 DC Restored Video AmplifierEL4094 Video Gain Control/FaderEL4095 Video Gain Contol/Fader/MultiplexerICL7106 LMC6953_NSC PCI Local Bus Power SupervisorMAX4147 300MHz, Low-Power, High-Output-Current, Differential Line DriverMAX4158 350MHz 2-Channel Video Multiplexer-AmplifierMAX4159 350MHz 2-Channel Video Multiplexer-AmplifierMAX4258 250MHz, 2-Channel Video Multiplexer-AmplifierMAX4259 250MHz 2-Channel Video Multiplexer-AmplifierMAX951 Ultra-Low-Power, Single-Supply Op Amp + Comparator + ReferenceMAX952 Ultra-Low-Power, Single-Supply Op Amp + Comparator + ReferenceMC1496 Balanced Modulator/DemodulatorPLL100k Generic Phase Locked loopPLL10k Generic Phase Locked loopPLL5k Generic Phase Locked loopPLLx Generic Phase Locked loop水位計
標簽： adc 模數轉換 altium designer
上傳時間： 2022-03-13
上傳用戶：
HX711_1Kg#include "HX711.h"float Weight = 0;void setup(){ Init_Hx711(); //初始化HX711模塊連接的IO設置 Serial.begin(9600); Serial.print("Welcome to use!\n"); delay(3000); Get_Maopi(); //獲取毛皮}void loop(){ Weight = Get_Weight(); //計算放在傳感器上的重物重量 Serial.print(float(Weight/1000),3); //串口顯示重量 Serial.print(" kg\n"); //顯示單位 Serial.print("\n"); //顯示單位 delay(1000); //延時1s}
上傳時間： 2022-03-20
上傳用戶：
以STM32F103C8T6為核心,設計了無刷直流電機控制器硬件電路。電路主要包括IR2310構成的PWM驅動電路、IRF3808構成的逆變電路、增量式旋轉編碼構成的速度反饋電路。控制器具有CAN和RS232通信接口,可與計算機或PLC構成速度或位置伺服系統。利用由xPC目標搭建的半實物仿真平臺對PI參數進行整定。測試了控制器的速度伺服響應性能,給定速度為2400rpm時,控制器響應時間為0.32s。實驗結果表明,系統工作可靠,穩定性好,響應速度快,可以滿足上肢康復機器人的機械臂速度控制性能要求。The hardware circuit of Brushless DC motor controller is designed by taking STM32F103C8T6 as the core,which mainly includes PWM driving circuits made up of IR2310,inverter circuit formed by IRF3808,speed feedback circuit composed of incremental rotary encoder and so on.Speed servo control system or position servo control system can be composed of BLDM controller with computer or PLC through CAN communication interface or RS232 serial communication interface.By using the hardware in the loop simulation platform built by xPC target,the PI parameters are set up.The Speed servo response performance of the controller is tested.When the speed is 2 400 rpm,the response time of the controller is 0...
上傳時間： 2022-05-07
上傳用戶：
Abstract: A sliding mode observer and fractional-order phase-locked loop (FO-PLL) method is proposed for the sensorless speed control of a permanent magnet synchronous motor (PMSM).The saturation function is adopted in order to reduce the chattering phenomenon caused by the sliding mode observer. In this proposed FO-PLL, method, a regulable fractional order r is involved, which means that the FO-PLL provides an extra degree of freedom. In fact, the conventional phase-locked loop (PLL) applied in sensorless PMSM control can be seen as a special case of the proposed FO-PLL. By selecting a proper fractional order r a better performance may be achieved. The computer simulation results demonstrate the effectiveness of the proposed method.Key words: fractional calculus; fractional order phase-locked loop; sensorless control; sliding mode observer; permanent magnet synchronous motor; speed controll
上傳時間： 2022-06-18
上傳用戶：
一.基礎理論鎖相環路（Phase Locked loop）是一個閉環的相位控制系統，它的輸出信號的相位能自動跟蹤輸入信號相位。系統框圖如下：當0，（1）與0：（1）相等時，兩矢量以相同的角速度旋轉，相對位置，即夾角維持不變，通常數值又較小，這就是環路的鎖定狀態。從輸入信號加到鎖相環路的輸入端開始，一直到環路達到鎖定的全過程，稱為捕獲過程。設系統最初進入同步狀態[2nrtto，e，.]的時間為1。。那么從1=1，的起始狀態到達進入同步狀態的全部過程就稱為鎖相環路的捕獲過程。捕獲過程所需的時間T，=1，-1，稱為捕獲時間。顯然，捕獲時間T，的大小不但與環路的參數有關，而且與起始狀態有關。對一定的環路來說，是否能通過捕獲而進入同步完全取決于起始頻差8.（4）-Ao。。若Ao，超過某一范圍，環路就不能捕獲了。這個范圍的大小是鎖相環路的一個重要性能指標，稱為環路的捕獲帶Ao，。
標簽： 射頻鎖相環
上傳時間： 2022-06-21
上傳用戶：
Agenda■Motor Types Overview■BLDC Motor Applications■Comparison of DC to Brushless DC Motors■Hall Sensors■Six-Step Commutation■Sensorless Commutation with Back-EMFVector Motor Control basicsClosed-loop Speed Control■Introduction to BLDC Motor Control Evaluation Kit■SummaryAll the popular motor types have their specific applications, and all can be controlled with microcontrollers.We wll talk about Brushless DC motors as it is the fast growing motor type today.Motors used in modern Air conditioners, home appliances, tools, even electric bikes are all going to Brushless DC.
上傳時間： 2022-07-07
上傳用戶：
