M.NT68676.2A is a monitor control board, which is suitable for Asia-Pacific market. It can supportLED/LCD panels which resolution is up to 2048×1152.M.NT68676.2A can synchronize with computer automatically. Synchronization requires thesynchronous signal which horizontal and vertical sync are separated.M.NT68676.2A can support dynamic contrast control, headphone input and Digital volume controlsimultaneously.
標簽： 樂華驅動板
上傳時間： 2022-03-13
上傳用戶：kent
電子書-RTL Design Style Guide for Verilog HDL540頁A FF having a fixed input value is generated from the description in the upper portion of Example 2-21. In this case, ’0’ is output when the reset signal is asynchronously input, and ’1’ is output when the START signal rises. Therefore, the FF data input is fixed at the power supply, since the typical value ’1’ is output following the rise of the START signal. When FF input values are fixed, the fixed inputs become untestable and the fault detection rate drops. When implementing a scan design and converting to a scan FF, the scan may not be executed properl not be executed properly, so such descriptions , so such descriptions are not are not recommended. recommended.[1] As in the lower part of Example 2-21, be sure to construct a synchronous type of circuit and ensure that the clock signal is input to the clock pin of the FF. Other than the sample shown in Example 2-21, there are situations where for certain control signals, those that had been switched due to the conditions of an external input will no longer need to be switched, leaving only a FF. If logic exists in a lower level and a fixed value is input from an upper level, the input value of the FF may also end up being fixed as the result of optimization with logic synthesis tools. In a situation like this, while perhaps difficult to completely eliminate, the problem should be avoided as much as possible.
標簽： RTL verilog hdl
上傳時間： 2022-03-21
上傳用戶：canderile
基于FPGA設計的相關論文資料大全 84篇用FPGA實現FFT的研究 劉朝暉 韓月秋 摘 要 目的 針對高速數字信號處理的要求，給出了用現場可編程門陣列(FPGA)實現的 快速傅里葉變換(FFT)方案.方法 算法為按時間抽取的基4算法，采用遞歸結構的塊浮點運 算方案，蝶算過程只擴展兩個符號位以適應雷達信號處理的特點，乘法器由陣列乘法器實 現.結果 采用流水方式保證系統的速度，使取數據、計算旋轉因子、復乘、DFT等操作協 調一致，在計算、通信和存儲間取得平衡，避免了瓶頸的出現.結論 實驗表明，用FPGA 實現高速數字信號處理的算法是一個可行的方案. 關鍵詞 離散傅里葉變換； 快速傅里葉變換； 塊浮點運算； 可編程門陣列 分類號 TP39； TN957.511 Implementation of FFT with FPGA Technology Liu Zhaohui Han Yueqiu (Department of Electronics Engineering, Beijing Institute of Technology, Beijing 100081) Abstract Aim To propose a scheme for implementing FFT with FPGA in accor-dance with the requirement for high speed digital signal processing. Methods The structure of FPGA and requirement of system were considered in the experiment, radix-4 algorithm of DIT and recursive structure were adopted. The group float point arithmetic operation was used in the butterfly and the array multiplier was used to realize multiplication. Results The pipeline pattern was used to ensure the system speed, it made fetching data, calculating twiddle factor, complex multiplication and D
標簽： fpga
上傳時間： 2022-03-23
上傳用戶：
本系統采用電動機電樞供電回路串接采樣電阻的方式來實現對小型直流有刷電動機的轉速測量。該系統主要由二階低通濾波電路,小信號放大電路、單片機測量顯示電路、開關穩(wěn)壓電源電路等組成。同時自制電機測速裝置,用高頻磁環(huán)作為載體,用線圈繞制磁環(huán),利用電磁感應原理檢測電機運行時的漏磁,將變化的磁場信號轉化為磁環(huán)上的感應電流。用信號處理單元電路將微弱電信號轉化為脈沖信號,送由單片機檢測,從而達到準確測量電機的速度的要求。In this system, the sampling resistance of armature power supply circuit is connected in series to measure the speed of small DC brush motor. The system is mainly composed of second-order low-pass filter circuit, small signal amplifier circuit, single-chip measurement and display circuit, switching regulated power supply circuit and so on. At the same time, the self-made motor speed measuring device uses high frequency magnetic ring as the carrier, coil winding magnetic ring, and electromagnetic induction principle to detect the leakage of magnetic field during the operation of the motor, which converts the changed magnetic field signal into the induced current on the magnetic ring. The weak electric signal is transformed into pulse signal by signal processing unit circuit, which is sent to single chip computer for detection, so as to meet the requirement of accurate measurement of motor speed.
標簽： 直流電動機
上傳時間： 2022-03-26
上傳用戶：
隨著光伏發(fā)電系統快速發(fā)展,以及電動汽車充電樁的普及,傳統的剩余電流保護器無法滿足實際需求。介紹了一款B型剩余電流保護器,采用磁調制剩余電流互感器和零序電流互感器采集剩余電流。根據GB/T 22794—2017標準要求,可識別1 kHz及以下的正弦交流、帶和不帶直流分量的脈動直流、平滑直流等剩余電流信號。經信號調理電路將電壓信號送到單片機進行采集和判斷。通過試驗測試,該樣機在測試精度和速度上均符合國家標準的相關要求。The rapid development of photovoltaic power generation systems and the popularity of electric vehicle charging piles make the traditional residual current protective devices unable to meet the actual demand.This paper proposed a type B residual current protective device,which uses the magnetically modulated residual current transformer and the zero sequence current transformer to acquire the residual current.According to the requirements of GB/T 22794—2017,the type B residual current protective device can detect sinusoidal AC residual current of 1kHz and below 1kHz,pulsating DC residual current with and without DC component,smooth DC residual current and so on.The signal processing circuit sends the voltage signal to the MCU for acquisition and judgment.Through experimental tests,the device meets the relevant requirements of national standards in terms of test accuracy and speed.
標簽： 電流保護器
上傳時間： 2022-03-27
上傳用戶：
本系統基于STM32單片機設計的非接觸式電流檢測控制系統,通過OPA548片將所給任意信號放大,由100Ω電阻和INA128芯片進行電流電壓轉換放大后,利用STM32單片機對獲取的電壓信號以0.488μs頻率采樣,利用STM32單片機的FFT庫,獲得信號的諧波信息。測量電流信號精準,該設計可廣泛應用在以STM32單片機為核心控制器件的新型儀表中,性能精準且抗干擾能力強。This system is a non-contact current detection and control system based on STM32 single chip microcomputer. It amplifiesany signal through OPA548 chip, converts and amplifies the current and voltage by 100 Ω resistance and INA128 chip. The obtainedvoltage signal is sampled at the frequency of 0.488 μs by STM 32 single chip microcomputer, and the harmonic information of the signalis obtained by the FFT library of STM 32 single chip microcomputer. The measurement of current signal is accurate. This design can bewidely used in a new instrument with STM 32 single chip microcomputer as its core control device, with accurate performance and stronganti-interference capability.
上傳時間： 2022-03-27
上傳用戶：
數字示波器功能強大,使用方便,但是價格相對昂貴。本文以Ti的MSP430F5529為主控器,以Altera公司的EP2C5T144C8 FPGA器件為邏輯控制部件設計數字示波器。模擬信號經程控放大、整形電路后形成方波信號送至FPGA測頻,根據頻率值選擇采用片上及片外高速AD分段采樣。FPGA控制片外AD采樣并將數據輸入到FIFO模塊中緩存,由單片機進行頻譜分析。測試表明:簡易示波器可以實現自動選檔、多采樣率采樣、高精度測頻及頻譜分析等功能。Digital oscilloscope is powerful and easy to use, but also expensive. The research group designed a low-cost digital oscilloscope, the chip of MSP430F5529 of TI is chosen as the main controller and the device of EP2C5T144C8 of Altera company is used as the logic control unit. Analog signal enter the programmable amplifier circuit, shaping circuit and other pre-processing circuit. The shaped rectangular wave signal is sent to FPGA for measure the frequency. According to the frequency value to select AD on-chip or off-chip high-speed AD for sampling. FPGA controls the off-chip AD sampling and buffers AD data by FIFO module. The single chip microcomputer receives the data, and do FFT for spectrum analysis. The test shows that the simple oscilloscope can realize automatic gain selection, sampling at different sampling rates, high precision frequency measurement and spectrum analysis.
上傳時間： 2022-03-27
上傳用戶：
ABB機器人編程手冊.pdfAliasIO is used to define a signal of any type with an alias name or to use signals in builtin task modules. Signals with alias names can be used for predefined generic programs, without any modification of the program before running in different robot installations. The instruction AliasIO must be run before any use of the actual signal. See Basic examples on page 21 for loaded modules, and More examples on page 22 for installed modules.
上傳時間： 2022-03-28
上傳用戶：kingwide
目的:自主研制一款超聲手術刀電源控制系統,以減少能量的消耗,維持手術刀的正常溫度。方法:對超聲換能器在諧振附近的等效電路建立模型,并設計基于數字信號處理(DSP)的超聲手術刀的硬件控制系統。結果:經對電源控制系統的電路和工作性能測試,生成的電流和電壓的有效值等參數,能夠及時調整電源的頻率,并達到預期的功能指標,使超聲手術刀工作在諧振狀態(tài)。結論:以DSP為核心設計的超聲手術刀電源控制系統,測試指標均能夠達到預期的要求,能夠使系統在諧振狀態(tài)下工作。Objective: To independently develop a power control system of ultrasonic scalpel so as to reduce the energy consumption and maintain the normal temperature of ultrasonic scalpel. Methods: In this paper, the model of equivalent circuit of ultrasonic transducer nearby syntony was built up, and the hardware control system of ultrasonic scalpel based on digital signal processing(DSP) was designed. Results: Through testing the circuit and work performance of power control system, the series of parameters such as effective value and so on which were produced by this system could adjust frequency of power source in time and attain anticipative functional indicator, and it took the ultrasonic scalpel to work in syntonic situation. Conclusion: The tested indicators of power control system of ultrasonic scalpel based on the kernel design of DSP can attain anticipative requirement, and can take this system to work in syntonic situation.
上傳時間： 2022-04-03
上傳用戶：bluedrops
本文首次設計并驗證了基于macom三合一芯片設計的光模塊電路,該電路旨在提供一種滿足SFF-8472中規(guī)定的數字診斷功能的低成本SFP+模塊。電路采用激光器驅動、限幅放大器、控制器以及時鐘恢復單元集成的單芯片,在保證高精度數字診斷功能基礎上,實現了低成本高可靠的特點。該電路在光接收接口組件與激光器驅動和限幅放大器單元的限幅放大器部分之間接入濾波器來提高模塊的靈敏度及信號質量。在控制器單元的數字電位器的引腳上采用外加電阻的方式避免出現上電不發(fā)光的故障問題。該研究結果為下一代SFP-DD光模塊設計與開發(fā)工作,奠定了一定的理論與實踐基礎。This paper designs and validates the optical module circuit based on the MACOM Trinity chip for the first time.This circuit aims to provide a low-cost SFP module which meets the digital diagnosis function specified in SFF-8472.The circuit uses a single chip integrated with laser driver,limiting amplifier,controller and clock recovery unit.On the basis of ensuring high precision digital diagnosis function,it achieves the characteristics of low cost and high reliability.The circuit connects a filter between the optical receiving interface module and the limiting amplifier part of the laser driver and limiting amplifier unit to improve the sensitivity and signal quality of the module.The pin of the digital potentiometer in the controller unit is equipped with an external resistance to avoid the problem of power failure.The research results lay a theoretical and practical foundation for optical module design in high-speed data center.
上傳時間： 2022-04-03
上傳用戶：
