Virtex-5, Spartan-DSP FPGAs Application Note This application note demonstrates how efficient implementations of Digital Up Converters(DUC) and Digital Down Converters (DDC) can be done by leveraging the Xilinx DSP IPportfolio for increased productivity and reduced time to development. Step-by-step instruction is given on how to perform system-level trade off analysis and develop the most efficient FPGA implementation, thus allowing engineers a flexible, low-cost and low-power alternative to ASSP technologies.
標(biāo)簽： Spartan-DSP Virtex FPGAs Ap
上傳時間： 2013-10-23
上傳用戶：raron1989
The PCA9516 is a BiCMOS integrated circuit intended forapplication in I2C and SMBus systems.While retaining all the operating modes and features of the I2Csystem, it permits extension of the I2C-bus by buffering both the data(SDA) and the clock (SCL) lines, thus enabling five buses of 400 pF.The I2C-bus capacitance limit of 400 pF restricts the number ofdevices and bus length. Using the PCA9516 enables the systemdesigner to divide the bus into five segments off of a hub where anysegment to segment transition sees only one repeater delay.
標(biāo)簽： 5channel 9516 PCA I2C
上傳時間： 2013-11-21
上傳用戶：q123321
The outputs of the PCA9518 are immediately available as soon as there is a voltage present on thesupply >~1V and behave as described above. The power-on reset of the PCA9518A keeps the outputsturned off during power-up and maintains the high impedance of the outputs throughout the power-upcycle. There is an additional built-in delay after power-up that allows the analog circuits to stabilize beforethe part is activated.
標(biāo)簽： Replacement 9518 NXP PCA
上傳時間： 2013-10-26
上傳用戶：13817753084
PLC 以 其 可靠性高、抗干擾能力強(qiáng)、配套齊全、功能完善、適應(yīng)性強(qiáng)等特點(diǎn)，廣泛應(yīng)用于各種控制領(lǐng)域。PLC作為通用工業(yè)控制計算機(jī)，是面向工礦企業(yè)的工控設(shè)備，使用梯形圖符號進(jìn)行編程，與繼電器電路相當(dāng)接近，被廣大工程技術(shù)人員接受。但是在實(shí)際應(yīng)用中，如何編程能夠提高PLC程序運(yùn)行速度是一個值得我們思考研究的問題。1 PLC工作原理PLC 與 計 算機(jī)的工作原理基本相同，即在系統(tǒng)程序的管理下，通過運(yùn)行應(yīng)用程序完成用戶任務(wù)。但兩者的工作方式有所不同。計算機(jī)一般采用等待命令的工作方式，而PLC在確定了工作任務(wù)并裝人了專用程序后成為一種專用機(jī)，它采用循環(huán)掃描工作方式，系統(tǒng)工作任務(wù)管理及應(yīng)用程序執(zhí)行都是用循環(huán)掃描方式完成的。PLC 有 兩 種基本的工作狀態(tài)，即運(yùn)行(RUN)與停止(STOP)狀態(tài)。在這兩種狀態(tài)下，PLC的掃描過程及所要完成的任務(wù)是不盡相同的，如圖1所示。 PLC在RUN工作狀態(tài)時，執(zhí)行一次掃描操作所的時間稱為掃描周期，其典型值通常為1一100nis，不同PLC廠家的產(chǎn)品則略有不同。掃描周期由內(nèi)部處理時間、輸A/ 輸出處理執(zhí)行時間、指令執(zhí)行時間等三部分組成。通常在一個掃描過程中，執(zhí)行指令的時間占了絕大部分，而執(zhí)行指令的時間與用戶程序的長短有關(guān)。用戶 程 序 是根據(jù)控制要求由用戶編制，由許多條PLC指令所組成。不同的指令所對應(yīng)的程序步不同，以三菱FX2N系列的PLC為例，PLC對每一個程序步操作處理時間為:基本指令占0.741s/步，功能指令占幾百微米/步。完成一個控制任務(wù)可以有多種編制程序的方法，因此，選擇合理、巧妙的編程方法既可以大大提高程序運(yùn)行速度，又可以保證可靠性。 提高PLC程序運(yùn)行速度的幾種編程方法2.1 用數(shù)據(jù)傳送給位元件組合的方法來控制輸出在 PL C應(yīng) 用編程中，最后都會有一段輸出控制程序，一般都是用邏輯取及輸出指令來編寫，如圖2所示。在圖2所示的程序中，邏輯取的程序步為1，輸出的程序步為2，執(zhí)行上述程序共需3個程序步。通常情況下，PLC要控制的輸出都不會是少量的，比如，有8個輸出，在條件滿足時要同時輸出。此時，執(zhí)行圖2所示的程序共需17個程序步。若我們通過位元件的組合并采用數(shù)據(jù)傳送的方法來完成圖2所示的程序，就會大大減少程序步驟。在三 菱 PLC中，只處理ON/off狀態(tài)的元件(如X,Y,M和S)，稱為位元件。但將位元件組合起來也可以處理數(shù)據(jù)。位元件組合由Kn加首元件號來表示。位元件每4bit為一組組合成單元。如K YO中的n是組數(shù)，當(dāng)n=1時，K,Yo 對應(yīng)的是Y3一Yo。當(dāng)n二2時，KZYo對應(yīng)的是Y7一Yo。通過位元件組合，就可以用處理數(shù)據(jù)的方式來處理位元件，圖2程序所示的功能可用圖3所示的傳送數(shù)據(jù)的方式來完成。
標(biāo)簽： PLC 程序 運(yùn)行速度 編程方法
上傳時間： 2013-11-11
上傳用戶：幾何公差
This application note describes how the existing dual-port block memories in the Spartan™-IIand Virtex™ families can be used as Quad-Port memories. This essentially involves a dataaccess time (halved) versus functionality (doubled) trade-off. The overall bandwidth of the blockmemory in terms of bits per second will remain the same.
上傳時間： 2013-11-08
上傳用戶：lou45566
This application note shows how to achieve low-cost, efficient serial configuration for Spartan FPGA designs. The approachrecommended here takes advantage of unused resources in a design, thereby reducing the cost, part count, memory size,and board space associated with the serial configuration circuitry. As a result, neither processor nor PROM needs to be fullydedicated to performing Spartan configuration.In particular, information is provided on how the idle processing time of an on-board controller can be used to loadconfiguration data from an off-board source. As a result, it is possible to upgrade a Spartan design in the field by sending thebitstream over a network.
標(biāo)簽： Spartan XAPP FPGA 098
上傳時間： 2014-08-16
上傳用戶：adada
The NCV7356 is a physical layer device for a single wire data linkcapable of operating with various Carrier Sense Multiple Accesswith Collision Resolution (CSMA/CR) protocols such as the BoschController Area Network (CAN) version 2.0. This serial data linknetwork is intended for use in applications where high data rate is notrequired and a lower data rate can achieve cost reductions in both thephysical media components and in the microprocessor and/ordedicated logic devices which use the network.The network shall be able to operate in either the normal data ratemode or a high-speed data download mode for assembly line andservice data transfer operations. The high-speed mode is onlyintended to be operational when the bus is attached to an off-boardservice node. This node shall provide temporary bus electrical loadswhich facilitate higher speed operation. Such temporary loads shouldbe removed when not performing download operations.The bit rate for normal communications is typically 33 kbit/s, forhigh-speed transmissions like described above a typical bit rate of83 kbit/s is recommended. The NCV7356 features undervoltagelockout, timeout for faulty blocked input signals, output blankingtime in case of bus ringing and a very low sleep mode current.
上傳時間： 2013-10-24
上傳用戶：s藍(lán)莓汁
The LTC®3207/LTC3207-1 is a 600mA LED/Camera driverwhich illuminates 12 Universal LEDs (ULEDs) and onecamera fl ash LED. The ULEDs are considered universalbecause they may be individually turned on or off, setin general purpose output (GPO) mode, set to blink at aselected on-time and period, or gradate on and off at aselected gradation rate. This device also has an externalenable (ENU) pin that may be used to blink, gradate, orturn on/off the LEDs without using the I2C bus. This may beuseful if the microprocessor is in sleep or standby mode. Ifused properly, these features may save valuable memoryspace, programming time, and reduce the I2C traffi c.
上傳時間： 2014-01-04
上傳用戶：LANCE
本軟件是關(guān)于MAX338, MAX339的英文數(shù)據(jù)手冊：MAX338, MAX339 8通道/雙4通道、低泄漏、CMOS模擬多路復(fù)用器 The MAX338/MAX339 are monolithic, CMOS analog multiplexers (muxes). The 8-channel MAX338 is designed to connect one of eight inputs to a common output by control of a 3-bit binary address. The dual, 4-channel MAX339 is designed to connect one of four inputs to a common output by control of a 2-bit binary address. Both devices can be used as either a mux or a demux. On-resistance is 400Ω max, and the devices conduct current equally well in both directions. These muxes feature extremely low off leakages (less than 20pA at +25°C), and extremely low on-channel leakages (less than 50pA at +25°C). The new design offers guaranteed low charge injection (1.5pC typ) and electrostatic discharge (ESD) protection greater than 2000V, per method 3015.7. These improved muxes are pin-compatible upgrades for the industry-standard DG508A and DG509A. For similar Maxim devices with lower leakage and charge injection but higher on-resistance, see the MAX328 and MAX329.
上傳時間： 2013-11-12
上傳用戶：18711024007
電子發(fā)燒友訊： 現(xiàn)場總線是指以工廠內(nèi)的測量和控制機(jī)器間的數(shù)字通訊為主的網(wǎng)絡(luò)，也稱現(xiàn)場網(wǎng)絡(luò)。也就是將傳感器、各種操作終端和控制器間的通訊及控制器之間的通訊進(jìn)行特化的網(wǎng)絡(luò)。原來這些機(jī)器間的主體配線是ON/off、接點(diǎn)信號和模擬信號，通過通訊的數(shù)字化，使時間分割、多重化、多點(diǎn)化成為可能，從而實(shí)現(xiàn)高性能化、高可靠化、保養(yǎng)簡便化、節(jié)省配線(配線的共享)。本文主要講述了現(xiàn)場總線在工業(yè)網(wǎng)絡(luò)中的應(yīng)用;現(xiàn)場總線的類別;工業(yè)自動化現(xiàn)場總線的分析。 現(xiàn)場總線是允許將分布式控制、監(jiān)測、檢測和管控的設(shè)備互連起來的通信系統(tǒng)。由于這項(xiàng)技術(shù)，傳感器、電磁閥、可編程控制器、電子驅(qū)動器和電腦等，便可以很容易地使用一個單一的且不依賴于任一設(shè)備制造商的低成本互連交換信息。 圖1 多種設(shè)備可以連接到現(xiàn)場總線進(jìn)行數(shù)據(jù)交換
標(biāo)簽： 現(xiàn)場總線 工業(yè)網(wǎng)絡(luò)
上傳時間： 2014-12-31
上傳用戶：gut1234567
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