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  • 《器件封裝用戶向導》賽靈思產品封裝資料

    Introduction to Xilinx Packaging Electronic packages are interconnectable housings for semiconductor devices. The major functions of the electronic packages are to provide electrical interconnections between the IC and the board and to efficiently remove heat generated by the device. Feature sizes are constantly shrinking, resulting in increased number of transistors being packed into the device. Today's submicron technology is also enabling large-scale functional integration and system-on-a-chip solutions. In order to keep pace with these new advancements in silicon technologies, semiconductor packages have also evolved to provide improved device functionality and performance. Feature size at the device level is driving package feature sizes down to the design rules of the early transistors. To meet these demands, electronic packages must be flexible to address high pin counts, reduced pitch and form factor requirements. At the same time,packages must be reliable and cost effective.

    標簽: 封裝 器件 用戶 賽靈思

    上傳時間: 2013-10-22

    上傳用戶:ztj182002

  • 基于CPLD的QDPSK調制解調電路設計

    為了在CDMA系統中更好地應用QDPSK數字調制方式,在分析四相相對移相(QDPSK)信號調制解調原理的基礎上,設計了一種QDPSK調制解調電路,它包括串并轉換、差分編碼、四相載波產生和選相、相干解調、差分譯碼和并串轉換電路。在MAX+PLUSⅡ軟件平臺上,進行了編譯和波形仿真。綜合后下載到復雜可編程邏輯器件EPM7128SLC84-15中,測試結果表明,調制電路能正確選相,解調電路輸出數據與QDPSK調制輸入數據完全一致,達到了預期的設計要求。 Abstract:  In order to realize the better application of digital modulation mode QDPSK in the CDMA system, a sort of QDPSK modulation-demodulation circuit was designed based on the analysis of QDPSK signal modulation-demodulation principles. It included serial/parallel conversion circuit, differential encoding circuit, four-phase carrier wave produced and phase chosen circuit, coherent demodulation circuit, difference decoding circuit and parallel/serial conversion circuit. And it was compiled and simulated on the MAX+PLUSⅡ software platform,and downloaded into the CPLD of EPM7128SLC84-15.The test result shows that the modulation circuit can exactly choose the phase,and the output data of the demodulator circuit is the same as the input data of the QDPSK modulate. The circuit achieves the prospective requirement of the design.

    標簽: QDPSK CPLD 調制解調 電路設計

    上傳時間: 2014-01-13

    上傳用戶:qoovoop

  • MEMS慣性傳感器的焊接指南

    Abstract: Standard PCB design and mounting processes can adversely influence MEMS inertial sensors.This application note contains guidelines for the layout, soldering, and mounting of MEMS inertialsensors in LGA packages in order to reduce stresses and improve functionality.

    標簽: MEMS 慣性傳感器 焊接

    上傳時間: 2014-01-15

    上傳用戶:sjb555

  • WP276 -可編程的開發和測試

    We all know the benefits of using FieldProgrammable Gate Arrays (FPGAs): no NRE, nominimum order quantities, and faster time-tomarket.In an ideal world, designs would never needto be changed because of design errors, but we allknow that sometimes this is necessary.

    標簽: 276 WP 可編程 測試

    上傳時間: 2013-11-04

    上傳用戶:leixinzhuo

  • 6小時學會labview

    6小時學會labview, labview Six Hour Course – Instructor Notes   This zip file contains material designed to give students a working knowledge of labview in a 6 hour timeframe. The contents are: Instructor Notes.doc – this document. labviewIntroduction-SixHour.ppt – a PowerPoint presentation containing screenshots and notes on the topics covered by the course. Convert C to F (Ex1).vi – Exercise 1 solution VI. Convert C to F (Ex2).vi – Exercise 2 solution subVI. Thermometer-DAQ (Ex2).vi – Exercise 2 solution VI. Temperature Monitor (Ex3).vi – Exercise 3 solution VI. Thermometer (Ex4).vi – Exercise 4 solution subVI. Convert C to F (Ex4).vi – Exercise 4 solution subVI. Temperature Logger (Ex4).vi – Exercise 4 solution VI. Multiplot Graph (Ex5).vi – Exercise 5 solution VI. Square Root (Ex6).vi – Exercise 6 solution VI. State Machine 1 (Ex7).vi – Exercise 7 solution VI.   The slides can be presented in two three hour labs, or six one hour lectures. Depending on the time and resources available in class, you can choose whether to assign the exercises as homework or to be done in class. If you decide to assign the exercises in class, it is best to assign them in order with the presentation. This way the students can create VI’s while the relevant information is still fresh. The notes associated with the exercise slide should be sufficient to guide the students to a solution. The solution files included are one possible solution, but by no means the only solution.

    標簽: labview

    上傳時間: 2013-10-13

    上傳用戶:zjwangyichao

  • 基于ZigBee技術的無線智能家用燃氣報警系統

    在研究傳統家用燃氣報警器的基礎上,以ZigBee協議為平臺,構建mesh網狀網絡實現網絡化的智能語音報警系統。由于傳感器本身的溫度和實際環境溫度的影響,傳感器標定后采用軟件補償方法。為了減少系統費用,前端節點采用半功能節點設備,路由器和協調器采用全功能節點設備,構建mesh網絡所形成的家庭內部報警系統,通過通用的電話接口連接到外部的公用電話網絡,啟動語音模塊進行報警。實驗結果表明,在2.4 GHz頻率下傳輸,有墻等障礙物的情況下,節點的傳輸距離大約為35 m,能夠滿足家庭需要,且系統工作穩定,但在功耗方面仍需進一步改善。 Abstract:  On the basis of studying traditional household gas alarm system, this paper proposed the platform for the ZigBee protocol,and constructed mesh network to achieve network-based intelligent voice alarm system. Because of the sensor temperature and the actual environment temperature, this system design used software compensation after calibrating sensor. In order to reduce system cost, semi-functional node devices were used as front-end node, however, full-function devices were used as routers and coordinator,constructed alarm system within the family by building mesh network,connected to the external public telephone network through the common telephone interface, started the voice alarm module. The results indicate that nodes transmit about 35m in the distance in case of walls and other obstacles by 2.4GHz frequency transmission, this is able to meet family needs and work steadily, but still needs further improvement in power consumption.

    標簽: ZigBee 無線智能 報警系統

    上傳時間: 2013-10-30

    上傳用戶:swaylong

  • 智能天線技術在基站中的應用

    為了能夠滿足基站易于選址、優質快速的建站要求和易維護、低成本、高可靠的運行要求,本文對以方艙來實現一體化結構基站做出一番探討。從系統設計的觀點闡述了移動通信高性能基站天線設計的幾個關鍵問題,介紹了智能天線技術在基站中的應用,并且用HFSS軟件仿真了一種新型的對稱陣子天線,該天線駐波比小于2的帶寬可以達到60%,具有良好的寬頻帶特性。 Abstract:  In order to meet the station construction requirement of easy site selection and fast base station, and meet the operational requirement of easy maintenance, low cost and high reliability, this paper discussed the unified architecture base station using shelter. Several key problems of high performance mobile communication base station antenna were illustrated from the view of system design, the application of smart antenna in base station was also introduced. And a novel dipole antenna was simulated by using HFSS, the VSWR of the antenna is less than 2, and the bandwidth was reach to 60%. So it has good broadband properties.

    標簽: 智能天線 基站 中的應用

    上傳時間: 2013-11-20

    上傳用戶:linlin

  • 《器件封裝用戶向導》賽靈思產品封裝資料

    Introduction to Xilinx Packaging Electronic packages are interconnectable housings for semiconductor devices. The major functions of the electronic packages are to provide electrical interconnections between the IC and the board and to efficiently remove heat generated by the device. Feature sizes are constantly shrinking, resulting in increased number of transistors being packed into the device. Today's submicron technology is also enabling large-scale functional integration and system-on-a-chip solutions. In order to keep pace with these new advancements in silicon technologies, semiconductor packages have also evolved to provide improved device functionality and performance. Feature size at the device level is driving package feature sizes down to the design rules of the early transistors. To meet these demands, electronic packages must be flexible to address high pin counts, reduced pitch and form factor requirements. At the same time,packages must be reliable and cost effective.

    標簽: 封裝 器件 用戶 賽靈思

    上傳時間: 2013-11-21

    上傳用戶:不懂夜的黑

  • XAPP444 - CPLD配件,技巧和竅門

    Most designers wish to utilize as much of a device as possible in order to enhance the overallproduct performance, or extend a feature set. As a design grows, inevitably it will exceed thearchitectural limitations of the device. Exactly why a design does not fit can sometimes bedifficult to determine. Programmable logic devices can be configured in almost an infinitenumber of ways. The same design may fit when you use certain implementation switches, andfail to fit when using other switches. This application note attempts to clarify the CPLD softwareimplementation (CPLDFit) options, as well as discuss implementation tips in CoolRunnerTM-IIdesigns in order to maximize CPLD utilization.

    標簽: XAPP CPLD 444 配件

    上傳時間: 2014-01-11

    上傳用戶:a471778

  • XAPP380 -利用CoolRunner-II CPLD創建交叉點開關

      This application note provides a functional description of VHDL source code for a N x N DigitalCrosspoint Switch. The code is designed with eight inputs and eight outputs in order to targetthe 128-macrocell CoolRunner™-II CPLD device but can be easily expanded to target higherdensity devices. To obtain the VHDL source code described in this document, go to sectionVHDL Code, page 5 for instructions.

    標簽: CoolRunner-II XAPP CPLD 380

    上傳時間: 2013-10-26

    上傳用戶:kiklkook

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