第一部分 信號完整性知識基礎(chǔ).................................................................................5第一章 高速數(shù)字電路概述.....................................................................................51.1 何為高速電路...............................................................................................51.2 高速帶來的問題及設(shè)計流程剖析...............................................................61.3 相關(guān)的一些基本概念...................................................................................8第二章 傳輸線理論...............................................................................................122.1 分布式系統(tǒng)和集總電路.............................................................................122.2 傳輸線的RLCG 模型和電報方程...............................................................132.3 傳輸線的特征阻抗.....................................................................................142.3.1 特性阻抗的本質(zhì).................................................................................142.3.2 特征阻抗相關(guān)計算.............................................................................152.3.3 特性阻抗對信號完整性的影響.........................................................172.4 傳輸線電報方程及推導(dǎo).............................................................................182.5 趨膚效應(yīng)和集束效應(yīng).................................................................................232.6 信號的反射.................................................................................................252.6.1 反射機理和電報方程.........................................................................252.6.2 反射導(dǎo)致信號的失真問題.................................................................302.6.2.1 過沖和下沖.....................................................................................302.6.2.2 振蕩：.............................................................................................312.6.3 反射的抑制和匹配.............................................................................342.6.3.1 串行匹配.........................................................................................352.6.3.1 并行匹配.........................................................................................362.6.3.3 差分線的匹配.................................................................................392.6.3.4 多負(fù)載的匹配.................................................................................41第三章 串?dāng)_的分析...............................................................................................423.1 串?dāng)_的基本概念.........................................................................................423.2 前向串?dāng)_和后向串?dāng)_.................................................................................433.3 后向串?dāng)_的反射.........................................................................................463.4 后向串?dāng)_的飽和.........................................................................................463.5 共模和差模電流對串?dāng)_的影響.................................................................483.6 連接器的串?dāng)_問題.....................................................................................513.7 串?dāng)_的具體計算.........................................................................................543.8 避免串?dāng)_的措施.........................................................................................57第四章 EMI 抑制....................................................................................................604.1 EMI/EMC 的基本概念..................................................................................604.2 EMI 的產(chǎn)生..................................................................................................614.2.1 電壓瞬變.............................................................................................614.2.2 信號的回流.........................................................................................624.2.3 共模和差摸EMI ..................................................................................634.3 EMI 的控制..................................................................................................654.3.1 屏蔽.....................................................................................................654.3.1.1 電場屏蔽.........................................................................................654.3.1.2 磁場屏蔽.........................................................................................674.3.1.3 電磁場屏蔽.....................................................................................674.3.1.4 電磁屏蔽體和屏蔽效率.................................................................684.3.2 濾波.....................................................................................................714.3.2.1 去耦電容.........................................................................................714.3.2.3 磁性元件.........................................................................................734.3.3 接地.....................................................................................................744.4 PCB 設(shè)計中的EMI.......................................................................................754.4.1 傳輸線RLC 參數(shù)和EMI ........................................................................764.4.2 疊層設(shè)計抑制EMI ..............................................................................774.4.3 電容和接地過孔對回流的作用.........................................................784.4.4 布局和走線規(guī)則.................................................................................79第五章 電源完整性理論基礎(chǔ)...............................................................................825.1 電源噪聲的起因及危害.............................................................................825.2 電源阻抗設(shè)計.............................................................................................855.3 同步開關(guān)噪聲分析.....................................................................................875.3.1 芯片內(nèi)部開關(guān)噪聲.............................................................................885.3.2 芯片外部開關(guān)噪聲.............................................................................895.3.3 等效電感衡量SSN ..............................................................................905.4 旁路電容的特性和應(yīng)用.............................................................................925.4.1 電容的頻率特性.................................................................................935.4.3 電容的介質(zhì)和封裝影響.....................................................................955.4.3 電容并聯(lián)特性及反諧振.....................................................................955.4.4 如何選擇電容.....................................................................................975.4.5 電容的擺放及Layout ........................................................................99第六章 系統(tǒng)時序.................................................................................................1006.1 普通時序系統(tǒng)...........................................................................................1006.1.1 時序參數(shù)的確定...............................................................................1016.1.2 時序約束條件...................................................................................1063.2 高速設(shè)計的問題.......................................................................................2093.3 SPECCTRAQuest SI Expert 的組件.......................................................2103.3.1 SPECCTRAQuest Model Integrity .................................................2103.3.2 SPECCTRAQuest Floorplanner/Editor .........................................2153.3.3 Constraint Manager .......................................................................2163.3.4 SigXplorer Expert Topology Development Environment .......2233.3.5 SigNoise 仿真子系統(tǒng)......................................................................2253.3.6 EMControl .........................................................................................2303.3.7 SPECCTRA Expert 自動布線器.......................................................2303.4 高速設(shè)計的大致流程...............................................................................2303.4.1 拓?fù)浣Y(jié)構(gòu)的探索...............................................................................2313.4.2 空間解決方案的探索.......................................................................2313.4.3 使用拓?fù)淠０弪?qū)動設(shè)計...................................................................2313.4.4 時序驅(qū)動布局...................................................................................2323.4.5 以約束條件驅(qū)動設(shè)計.......................................................................2323.4.6 設(shè)計后分析.......................................................................................233第四章 SPECCTRAQUEST SIGNAL EXPLORER 的進(jìn)階運用..........................................2344.1 SPECCTRAQuest Signal Explorer 的功能包括：................................2344.2 圖形化的拓?fù)浣Y(jié)構(gòu)探索...........................................................................2344.3 全面的信號完整性(Signal Integrity)分析.......................................2344.4 完全兼容 IBIS 模型...............................................................................2344.5 PCB 設(shè)計前和設(shè)計的拓?fù)浣Y(jié)構(gòu)提取.......................................................2354.6 仿真設(shè)置顧問...........................................................................................2354.7 改變設(shè)計的管理.......................................................................................2354.8 關(guān)鍵技術(shù)特點...........................................................................................2364.8.1 拓?fù)浣Y(jié)構(gòu)探索...................................................................................2364.8.2 SigWave 波形顯示器........................................................................2364.8.3 集成化的在線分析(Integration and In-process Analysis) .236第五章 部分特殊的運用...............................................................................2375.1 Script 指令的使用..................................................................................2375.2 差分信號的仿真.......................................................................................2435.3 眼圖模式的使用.......................................................................................249第四部分：HYPERLYNX 仿真工具使用指南............................................................251第一章 使用LINESIM 進(jìn)行前仿真.......................................................................2511.1 用LineSim 進(jìn)行仿真工作的基本方法...................................................2511.2 處理信號完整性原理圖的具體問題.......................................................2591.3 在LineSim 中如何對傳輸線進(jìn)行設(shè)置...................................................2601.4 在LineSim 中模擬IC 元件.....................................................................2631.5 在LineSim 中進(jìn)行串?dāng)_仿真...................................................................268第二章 使用BOARDSIM 進(jìn)行后仿真......................................................................2732.1 用BOARDSIM 進(jìn)行后仿真工作的基本方法...................................................2732.2 BoardSim 的進(jìn)一步介紹..........................................................................2922.3 BoardSim 中的串?dāng)_仿真..........................................................................309
標(biāo)簽： PCB 內(nèi)存 仿真技術(shù)
上傳時間： 2013-11-07
上傳用戶：aa7821634
This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.
標(biāo)簽： pci PCB 設(shè)計規(guī)范
上傳時間： 2014-01-24
上傳用戶：s363994250
PADS Layout教程簡介 歡迎使用PADS Layout教程。本教程由比思電子有限公司(KGS Technology Ltd.)編寫，本公司是Mentor (以前的 Innoveda-PADS) PADS（以前的PowerPCB） 產(chǎn)品、APLAC 的射頻和微波仿真工具、DPS 的電氣圖CAD系統(tǒng)在中國的授權(quán)代 理商。KGS公司自1989年開始，一直致力于PADS軟件產(chǎn)品的銷售和支持。 公司提供電子產(chǎn)品在原理樣機設(shè)計開發(fā)階段全面的解決方案。包括相關(guān)的 CAE/CAD/CAM等EDA軟件、提供PCB設(shè)計服務(wù)、PCB樣板加工制造、快速PCB 加工設(shè)備、PCB元器件裝配。所有技術(shù)人員都具有十年以上的PCB設(shè)計領(lǐng)域從業(yè) 經(jīng)歷。
標(biāo)簽： Layout PADS Technology 教程
上傳時間： 2013-12-14
上傳用戶：xz85592677
this document is related to the orcad layout plus. this document is useful in understanding and starting the orcad pcb design tool layout plus.
標(biāo)簽： document this understanding related
上傳時間： 2017-06-02
上傳用戶：wys0120
PCB電路板參考資料 設(shè)計的pcb電路板基本layout不限布局基礎(chǔ)
標(biāo)簽： 電路板
上傳時間： 2015-06-19
上傳用戶：yjdhqcc
PADS Layout 的用戶接口具有非常易于使用和有效的特點。PADS Layout 在滿足專業(yè)用戶需要的同時，還考慮到一些初次使用PCB 軟件的用戶需求。教程的這節(jié)將將覆蓋以下內(nèi)容：· 使用PADS Layout 進(jìn)行交互操作· 工作空間的使用· 設(shè)置柵格(Grids)· 使用取景(Pan)和縮放(Zoom)· 面向目標(biāo)(Object Oriented)的選取方式
標(biāo)簽： pads
上傳時間： 2021-11-28
上傳用戶：
開關(guān)電源PCB布局布線教材， 開關(guān)電源的PCB設(shè)計(布局、排版、走線)規(guī)范.pdf_電子/電路_工程科技_專業(yè)資料。比較詳細(xì)的講述了PCB布線的一些小技巧 。Specification for PCB design (layout, layout and routing) of | switch power supply. Pdf_ electronics/circuits _ engineering technology _ professional information. More detailed about the PCB wiring some tips
標(biāo)簽： 開關(guān)電源 pcb
上傳時間： 2022-07-27
上傳用戶：
VIP專區(qū)-PCB源碼精選合集系列（5）資源包含以下內(nèi)容：1. 51單片機開發(fā)板原理圖+pcb+sch文件.2. protues 7.0器件庫名大全.3. 華為的電路板設(shè)計規(guī)范.4. ARM開發(fā)板原理圖和PCB.5. AD9.4.0.20159破解補丁.6. protel99鼠標(biāo)增強工具.7. Altium Designer 10破解工具.8. STC15xx-protel-lib.9. 按鍵消抖的方法.10. win7系統(tǒng)Protel99庫文件添加小軟件.exe.11. ALLEGRO封裝庫.12. mil與mm單位換算器.13. PCB封裝庫_99SE和DXP.14. 一款小巧PCB繪制軟件.15. protel技術(shù)大全.16. PCB庫及原理圖庫.17. AD09自制元件庫.18. protel99元件庫.19. PadsHelper 2726 Setup(cn).20. 封裝庫尺寸.21. cadence16.3安裝與破解.22. 實踐電磁兼容設(shè)計-PCB布線基本措施.23. si9000.24. CadenceAllegro16.5-破解方法.25. PADS Layout四層板設(shè)置學(xué)習(xí)教材.26. 電路設(shè)計與制版Protel99高級應(yīng)用.27. pcb_layout_的指導(dǎo)思想與基本走線要求.28. PADS Logic_Layout原理圖與電路板設(shè)計.29. 山寨制作電路板七種方法.30. DC-DC經(jīng)典PCB布局.31. [Altium.Designer.6（6.6含破解文件）安裝、升級總結(jié)].AD66Crack.32. 電子電焊機保護(hù)器之自恢復(fù)保險絲.33. 關(guān)于AD中如何添加LOGO的方法.34. protel_dxp規(guī)則設(shè)置.35. Altium.Designer.v10.0+keygen.36. AD中關(guān)于文件的打印（PDF）.37. 一個畫板十年工程師總結(jié)PCB設(shè)計的經(jīng)驗（經(jīng)典）.38. AD中關(guān)于Gerber文件的輸出.39. protel_DXP第8章.40. PCB走線寬度標(biāo)準(zhǔn)（軍用）.
上傳時間： 2013-06-21
上傳用戶：eeworm
VIP專區(qū)-PCB源碼精選合集系列（10）資源包含以下內(nèi)容：1. Cadence_SPB16.2入門教程——PCB布線（三）.2. Allegro中遇到的問題.3. Cadence_SPB16.2入門教程——PCB布線（一）.4. Proteus的基本操作.5. Cadence_SPB16.2入門教程——PCB布線（二）.6. PCB設(shè)計制造常見問題.7. Cadence_SPB16.2入門教程——輸出底片文件（一）.8. Altium_Designer電子工程師培訓(xùn).9. pcb設(shè)計資料畢看.10. 熱轉(zhuǎn)印制PCB板中的打印設(shè)置.11. 10項protel常用設(shè)置.12. altium designer 10 正式版下載及安裝PDF.13. PADS Layout把非中心對稱封裝的元件坐標(biāo)導(dǎo)出所修改的Basic Scr.14. CH375評估板的原理圖和PCB及USB的PCB布線示例.15. cadence講義(清華大學(xué)微電子所).16. AD快捷鍵匯總.17. 240*128液晶的驅(qū)動電路（PCB）.18. pcb經(jīng)驗(耗費多年整理于論壇).19. PCB設(shè)計要求簡介.20. PADS學(xué)習(xí)資料.21. 印刷電路板的設(shè)計過程.22. ipc7351標(biāo)準(zhǔn)介紹.23. Mark點（基準(zhǔn)點）設(shè)計規(guī)范.24. Altium Designer 6 三維元件庫建模教程.25. 印制電路板圖設(shè)計指南.26. 中興通訊硬件巨作:信號完整性基礎(chǔ)知識.27. 華為pcb培訓(xùn).28. ORCAD使用中常見問題匯集及答案.29. 簡述PCB線寬和電流關(guān)系.30. AltiumDesignerSummer9Build9破解.31. ORCAD基本問題集成.32. 射頻電路板設(shè)計技巧.33. PCB設(shè)計基礎(chǔ)知識（全 ）.34. ORCAD原理圖中替換器件屬性.35. PCB設(shè)計時銅箔厚度,走線寬度和電流的關(guān)系.36. PADS9.0Demo.37. PCB元件封裝設(shè)計規(guī)范.38. DDR走線要點.39. 2007 Release Highlight CN.40. Genesis2000線路的處理步驟.
標(biāo)簽： 壓電器件
上傳時間： 2013-06-23
上傳用戶：eeworm
VIP專區(qū)-PCB源碼精選合集系列（11）資源包含以下內(nèi)容：1. PADS導(dǎo)出Gerber文件.2. 2005 SP2 Release Highlight CN.3. 如何在Altium_Designer軟件的PCB編輯器插入自己的LOGO.4. PRO/cabling 三維布線.5. PADS_教程－高級封裝設(shè)計.6. Altium Designer Winter 09原理圖及PCB設(shè)計簡明教程.7. PCB接地設(shè)計.8. PCB元件封裝的設(shè)計規(guī)范.9. Altium.Designer.6.0.中文手冊.10. PCB封裝庫命名的細(xì)規(guī)則.11. PCB入門大全很棒的.12. PCB圖設(shè)計技巧.13. 超強布線經(jīng)驗教程大全.14. PCB設(shè)計技巧問答.15. PADS LAYOUT入門教程.16. 多層板PCB設(shè)計教程完整版.17. 自制電路板制作PCB的過程.18. 改善EMC的PCB設(shè)計.19. PADS原理圖與PCB設(shè)計學(xué)習(xí)計劃.20. PCB制作步驟全過程.21. ORCAD PSPICE 16.5crack文件.22. PCB資料.23. Altium+Designer+winter+09電路設(shè)計案例教程.24. PADS經(jīng)驗分享.25. 印刷電路板相關(guān)問題解答.26. 手工制作PCB流程.27. Altium.Designer 9.0破解文件.28. PROTUS中元件英文縮寫.29. 德州儀器的庫文件.30. 淺談原理圖和PCB圖的常見錯誤.31. 功放放大器原理圖pcb自制符號和封裝.32. PCB多層板設(shè)計建議及實例.33. PADS2007_ROUTER中文教程.34. PADS_LOGIC從零開始學(xué)習(xí).35. LQFP封裝制作.36. 芯片封裝方式大全.37. 原創(chuàng)看圖快速學(xué)PADS_LAYOUT_PCB拼板教程.38. pads提高高速設(shè)計流程.39. Altium designer summer 09 精典教材---絕佳.40. 元器件封裝的含義.
標(biāo)簽： 工程 測試 技術(shù)基礎(chǔ)
上傳時間： 2013-05-19
上傳用戶：eeworm
蟲蟲下載站版權(quán)所有 京ICP備2021023401號-1
