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switchING

  • I2C slave routines for the 87L

    The 87LPC76X Microcontroller combines in a small package thebenefits of a high-performance microcontroller with on-boardhardware supporting the Inter-Integrated Circuit (I2C) bus interface.The 87LPC76X can be programmed both as an I2C bus master, aslave, or both. An overview of the I2C bus and description of the bussupport hardware in the 87LPC76X microcontrollers appears inapplication note AN464, Using the 87LPC76X Microcontroller as anI2C Bus Master. That application note includes a programmingexample, demonstrating a bus-master code. Here we show anexample of programming the microcontroller as an I2C slave.The code listing demonstrates communications routines for the87LPC76X as a slave on the I2C bus. It compliments the program inAN464 which demonstrates the 87LPC76X as an I2C bus master.One may demonstrate two 87LPC76X devices communicating witheach other on the I2C bus, using the AN464 code in one, and theprogram presented here in the other. The examples presented hereand in AN464 allow the 87LPC76X to be either a master or a slave,but not both. switchING between master and slave roles in amultimaster environment is described in application note AN435.The software for a slave on the bus is relatively simple, as theprocessor plays a relatively passive role. It does not initiate bustransfers on its own, but responds to a master initiating thecommunications. This is true whether the slave receives or transmitsdata—transmission takes place only as a response to a busmaster’s request. The slave does not have to worry about arbitrationor about devices which do not acknowledge their address. As theslave is not supposed to take control of the bus, we do not demandit to resolve bus exceptions or “hangups”. If the bus becomesinactive the processor simply withdraws, not interfering with themaster (or masters) on the bus which should (hopefully) try toresolve the situation.

    標簽: routines slave I2C 87L

    上傳時間: 2013-11-19

    上傳用戶:shirleyYim

  • 基于DSP與FPGA的多視頻通道的切換控制

    為了擴大監控范圍,提高資源利用率,降低系統成本,提出了一種多通道視頻切換的解決方案。首先從視頻信號分離出行場信號,然后根據行場信號由DSP和FPGA產生控制信號,控制多路視頻通道之間的切換,從而實現讓一個視頻處理器同時監控不同場景。實驗結果表明,該方案可以在視頻監控告警系統中穩定、可靠地實現視頻通道的切換。 Abstract:  To expand the scope of monitoring, improve resource utilization, reduce system cost, a multiple video channels signal switchING method is pointed out in this paper. First, horizontal sync signal and field sync signal from the video signal are separated, then control signal according to the sync signal by DSP and FPGA is generated to control the switchING between multiple video channels. Thus, it achieves to make a video processor to monitor different place. Experimental results show that the method can realize video channel switchING reliably, and is applied in the video monitoring warning system successfully.

    標簽: FPGA DSP 視頻通道 切換控制

    上傳時間: 2013-11-09

    上傳用戶:不懂夜的黑

  • SOC驗證方法

    Prakash Rashinkar has over 15 years experience in system design and verificationof embedded systems for communication satellites, launch vehicles and spacecraftground systems, high-performance computing, switchING, multimedia, and wirelessapplications. Prakash graduated with an MSEE from Regional Engineering College,Warangal, in India. He lead the team that was responsible for delivering themethodologies for SOC verification at Cadence Design Systems. Prakash is anactive member of the VSIA Functional Verification DWG. He is currently Architectin the Vertical Markets and Design Environments Group at Cadence.

    標簽: SOC 驗證方法

    上傳時間: 2014-01-24

    上傳用戶:xinhaoshan2016

  • SOC驗證方法

    Prakash Rashinkar has over 15 years experience in system design and verificationof embedded systems for communication satellites, launch vehicles and spacecraftground systems, high-performance computing, switchING, multimedia, and wirelessapplications. Prakash graduated with an MSEE from Regional Engineering College,Warangal, in India. He lead the team that was responsible for delivering themethodologies for SOC verification at Cadence Design Systems. Prakash is anactive member of the VSIA Functional Verification DWG. He is currently Architectin the Vertical Markets and Design Environments Group at Cadence.

    標簽: SOC 驗證方法

    上傳時間: 2013-11-19

    上傳用戶:m62383408

  • 數字與模擬電路設計技巧

    數字與模擬電路設計技巧IC與LSI的功能大幅提升使得高壓電路與電力電路除外,幾乎所有的電路都是由半導體組件所構成,雖然半導體組件高速、高頻化時會有EMI的困擾,不過為了充分發揮半導體組件應有的性能,電路板設計與封裝技術仍具有決定性的影響。 模擬與數字技術的融合由于IC與LSI半導體本身的高速化,同時為了使機器達到正常動作的目的,因此技術上的跨越競爭越來越激烈。雖然構成系統的電路未必有clock設計,但是毫無疑問的是系統的可靠度是建立在電子組件的選用、封裝技術、電路設計與成本,以及如何防止噪訊的產生與噪訊外漏等綜合考慮。機器小型化、高速化、多功能化使得低頻/高頻、大功率信號/小功率信號、高輸出阻抗/低輸出阻抗、大電流/小電流、模擬/數字電路,經常出現在同一個高封裝密度電路板,設計者身處如此的環境必需面對前所未有的設計思維挑戰,例如高穩定性電路與吵雜(noisy)性電路為鄰時,如果未將噪訊入侵高穩定性電路的對策視為設計重點,事后反復的設計變更往往成為無解的夢魘。模擬電路與高速數字電路混合設計也是如此,假設微小模擬信號增幅后再將full scale 5V的模擬信號,利用10bit A/D轉換器轉換成數字信號,由于分割幅寬祇有4.9mV,因此要正確讀取該電壓level并非易事,結果造成10bit以上的A/D轉換器面臨無法順利運作的窘境。另一典型實例是使用示波器量測某數字電路基板兩點相隔10cm的ground電位,理論上ground電位應該是零,然而實際上卻可觀測到4.9mV數倍甚至數十倍的脈沖噪訊(pulse noise),如果該電位差是由模擬與數字混合電路的grand所造成的話,要測得4.9 mV的信號根本是不可能的事情,也就是說為了使模擬與數字混合電路順利動作,必需在封裝與電路設計有相對的對策,尤其是數字電路switchING時,ground vance noise不會入侵analogue ground的防護對策,同時還需充分檢討各電路產生的電流回路(route)與電流大小,依此結果排除各種可能的干擾因素。以上介紹的實例都是設計模擬與數字混合電路時經常遇到的瓶頸,如果是設計12bit以上A/D轉換器時,它的困難度會更加復雜。

    標簽: 數字 模擬電路 設計技巧

    上傳時間: 2014-02-12

    上傳用戶:wenyuoo

  • 開關電源EMI設計(英文版)

    Integrated EMI/Thermal Design forswitchING Power SuppliesWei ZhangThesis submitted to the Faculty of theVirginia Polytechnic Institute and State Universityin partial fulfillment of the requirements for the degree of Integrated EMI/Thermal Design forswitchING Power SuppliesWei Zhang(ABSTRACT)This work presents the modeling and analysis of EMI and thermal performancefor switch power supply by using the CAD tools. The methodology and design guidelinesare developed.By using a boost PFC circuit as an example, an equivalent circuit model is builtfor EMI noise prediction and analysis. The parasitic elements of circuit layout andcomponents are extracted analytically or by using CAD tools. Based on the model, circuitlayout and magnetic component design are modified to minimize circuit EMI. EMI filtercan be designed at an early stage without prototype implementation.In the second part, thermal analyses are conducted for the circuit by using thesoftware Flotherm, which includes the mechanism of conduction, convection andradiation. Thermal models are built for the components. Thermal performance of thecircuit and the temperature profile of components are predicted. Improved thermalmanagement and winding arrangement are investigated to reduce temperature.In the third part, several circuit layouts and inductor design examples are checkedfrom both the EMI and thermal point of view. Insightful information is obtained.

    標簽: EMI 開關電源 英文

    上傳時間: 2013-11-16

    上傳用戶:萍水相逢

  • ATmega8 taillight circuitAn assembly language program that generates 5 different static patterns wit

    ATmega8 taillight circuitAn assembly language program that generates 5 different static patterns with switchING from pattern-to-pattern controlled by the depression of one push-button switch (S2).

    標簽: taillight circuitAn generates different

    上傳時間: 2014-01-12

    上傳用戶:wanghui2438

  • The Joint Video Team (JVT) of ISO/IEC MPEG and ITU-T VCEG are finalising a new standard for the cod

    The Joint Video Team (JVT) of ISO/IEC MPEG and ITU-T VCEG are finalising a new standard for the coding (compression) of natural video images. The new standard [1] will be known as H.264 and also MPEG-4 Part 10, “Advanced Video Coding”. This document introduces the concepts of switchING P and I slices, part of the Extended Profile of H.264.

    標簽: finalising standard Joint ITU-T

    上傳時間: 2013-11-30

    上傳用戶:kbnswdifs

  • This demonstration shows how a ZigBee coordinator can be set up. This demo allows the Demonstratio

    This demonstration shows how a ZigBee coordinator can be set up. This demo allows the Demonstration Board (PICDEM Z or Explorer 16) to act as either a "switchING Load Controller" (e.g. a light) or a "switchING Remote Control" (e.g. a switch) as defined by the Home Controls, Lighting profile. It is designed to interact with a second Demonstration board programmed with the Demo RFD project

    標簽: This demonstration Demonstratio coordinator

    上傳時間: 2014-01-18

    上傳用戶:dianxin61

  • 第一章:Internetworking 第二章:Internet Protocols 第三章:IP Subnetting and Variable Length Subnet Masks(VLS

    第一章:Internetworking 第二章:Internet Protocols 第三章:IP Subnetting and Variable Length Subnet Masks(VLSM) 第四章:Introduction to the Cisco IOS 第五章:IP路由 第六章:Enhanced IGRP(EIGRP) and Open Shortest Path First(OSPF) 第七章:Layer 2 switchING 第八章:Virtual LANs(VLANs) 第九章:Managing a Cisco Interwork 第十章:Managing Traffic with Access Lists 第十一章:Wide Area Networking Protocols

    標簽: Internetworking Subnetting Protocols Internet

    上傳時間: 2014-01-05

    上傳用戶:qiao8960

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