nios ii 入門手冊中文版 一、建立quartus ii工程 首先，雙擊quartus ii 9.1圖標打開軟件，界面如下圖1.1所示 1.1 新建工程 （1） 點擊file –>New Project wizard 出現圖1.2所示的對話框。 （2） 點擊Next。如圖1.3所示：第一行是工程的路徑，二、三行為實體名。填好后點擊Next。 （3）此處可選擇加入已設計好的文件到工程，點擊Next。 （4）選擇設計器件如圖1.5所示。接著點擊Next （5）接著點擊Next。無需改動，點擊finish，顯示如下圖所示。 （6）此時，工程已經建立完成，接下來需要建立一個原理圖輸入文件，點擊file –>New ->Block Diagram/Schematic File 后如圖所示。
上傳時間： 2014-12-25
上傳用戶：cx111111
QuartusII中利用免費IP核的設計 作者：雷達室 以設計雙端口RAM為例說明。 Step1：打開QuartusII，選擇File—New Project wizard，創建新工程，出現圖示對話框，點擊Next；
上傳時間： 2014-12-28
上傳用戶：fghygef
The LogiCORE™ GTP wizard automates the task of creating HDL wrappers to configure the high-speed serial GTP transceivers in Virtex™-5 LXT and SXT devices. The menu-driven interface allows one or more GTP transceivers to be configured using pre-definedtemplates for popular industry standards, or from scratch, to support a wide variety of custom protocols.The wizard produces a wrapper, an example design, and a testbench for rapid integration and verification of the serial interface with your custom function Features• Creates customized HDL wrappers to configureVirtex-5 RocketIO™ GTP transceivers• Users can configure Virtex-5 GTP transceivers toconform to industry standard protocols usingpredefined templates, or tailor the templates forcustom protocols• Included protocol templates provide support for thefollowing specifications: Aurora, CPRI, FibreChannel 1x, Gigabit Ethernet, HD-SDI, OBSAI,OC3, OC12, OC48, PCI Express® (PCIe®), SATA,SATA II, and XAUI• Automatically configures analog settings• Each custom wrapper includes example design, testbench; and both implementation and simulation scripts
標簽： Transceiver Virtex Wizar GTP
上傳時間： 2013-10-23
上傳用戶：leyesome
飛思卡爾S12處理器培訓講義 In this LAB, we will: Get familiar with CodeWarrior 4.7 IDE; How to work with project wizard; Light the LEDs
上傳時間： 2013-11-13
上傳用戶：LIKE
With the Altera Nios II embedded processor, you as the system designercan accelerate time-critical software algorithms by adding custominstructions to the Nios II processor instruction set. Using custominstructions, you can reduce a complex sequence of standard instructionsto a single instruction implemented in hardware. You can use this featurefor a variety of applications, for example, to optimize software innerloops for digital signal processing (DSP), packet header processing, andcomputation-intensive applications. The Nios II configuration wizard,part of the Quartus® II software’s SOPC Builder, provides a graphicaluser interface (GUI) used to add up to 256 custom instructions to theNios II processor
上傳時間： 2013-11-07
上傳用戶：swing
解壓包包含了C語言入門經典教程和Visuak c++軟件 【基本簡介】 Visual C++是一個功能強大的可視化軟件開發工具。自1993年Microsoft公司推出Visual C++1.0后，隨著其新版本的不斷問世，Visual C++已成為專業程序員進行軟件開發的首選工具。 雖然微軟公司推出了Visual C++.NET(Visual C++7.0)，但它的應用的很大的局限性，只適用于Windows 2000,Windows XP和Windows NT4.0。所以實際中，更多的是以Visual C++6.0為平臺。 Visual C++6.0不僅是一個C++編譯器，而且是一個基于Windows操作系統的可視化集成開發環境（integrated development environment,IDE）。Visual C++6.0由許多組件組成，包括編輯器、調試器以及程序向導Appwizard、類向導Class wizard等開發工具。 這些組件通過一個名為Developer Studio的組件集成為和諧的開發環境。 在Visual C++ 6.0 企業版的基礎上集成官方的SP6升級補丁制作而成！免序列號，安裝完即可使用，無需再打補丁！ 【使用方法】 有些朋友反應在安裝后出現 "Error spawning error" 可以看看下面綠色軟件找到的一些解決方案： 點擊VC“TOOLS（工具）”—>“Option（選擇）”—>“Directories（目錄）”重新設置“Excutable Fils、Include Files、Library Files、Source Files”的路徑。很多情況可能就一個盤符的不同（例如你的VC裝在C，但是這些路徑全部在D），改過來就OK了。
上傳時間： 2013-10-09
上傳用戶：hui626493
QuartusII中利用免費IP核的設計 作者：雷達室 以設計雙端口RAM為例說明。 Step1：打開QuartusII，選擇File—New Project wizard，創建新工程，出現圖示對話框，點擊Next；
上傳時間： 2013-10-18
上傳用戶：909000580
Nios II定制指令用戶指南：With the Altera Nios II embedded processor, you as the system designer can accelerate time-critical software algorithms by adding custom instructions to the Nios II processor instruction set. Using custom instructions, you can reduce a complex sequence of standard instructions to a single instruction implemented in hardware. You can use this feature for a variety of applications, for example, to optimize software inner loops for digital signal processing (DSP), packet header processing, and computation-intensive applications. The Nios II configuration wizard,part of the Quartus® II software’s SOPC Builder, provides a graphical user interface (GUI) used to add up to 256 custom instructions to the Nios II processor. The custom instruction logic connects directly to the Nios II arithmetic logic unit (ALU) as shown in Figure 1–1.
上傳時間： 2013-10-12
上傳用戶：kang1923
The LogiCORE™ GTP wizard automates the task of creating HDL wrappers to configure the high-speed serial GTP transceivers in Virtex™-5 LXT and SXT devices. The menu-driven interface allows one or more GTP transceivers to be configured using pre-definedtemplates for popular industry standards, or from scratch, to support a wide variety of custom protocols.The wizard produces a wrapper, an example design, and a testbench for rapid integration and verification of the serial interface with your custom function Features• Creates customized HDL wrappers to configureVirtex-5 RocketIO™ GTP transceivers• Users can configure Virtex-5 GTP transceivers toconform to industry standard protocols usingpredefined templates, or tailor the templates forcustom protocols• Included protocol templates provide support for thefollowing specifications: Aurora, CPRI, FibreChannel 1x, Gigabit Ethernet, HD-SDI, OBSAI,OC3, OC12, OC48, PCI Express® (PCIe®), SATA,SATA II, and XAUI• Automatically configures analog settings• Each custom wrapper includes example design, testbench; and both implementation and simulation scripts
標簽： Transceiver Virtex Wizar GTP
上傳時間： 2013-10-20
上傳用戶：dave520l
在這一章節，你將使用Die wizard 向導定義一個die 元件的參數結構。你也可以學到如
上傳時間： 2013-11-14
上傳用戶：hebmuljb
