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• verilog code 16-bit carry look-ahead adder output [15:0] sum // 相加總和 output carryout // 進(jìn)位 input免費(fèi)下載

  資源簡(jiǎn)介：verilog code 16-bit carry look-ahead adder output [15:0] sum // 相加總和 output carryout // 進(jìn)位 input [15:0] A_in // 輸入A input [15:0] B_in // 輸入B input carryin // 第一級(jí)進(jìn)位 C0

  標(biāo)簽： output look-ahead carryout verilog

  上傳時(shí)間： 2014-12-06

  上傳用戶：ls530720646

• verilog code 4-bit carry look-ahead adder output [3:0] s //summation output cout //carryout inpu免費(fèi)下載

  資源簡(jiǎn)介：verilog code 4-bit carry look-ahead adder output [3:0] s //summation output cout //carryout input [3:0] i1 //input1 input [3:0] i2 //input2 input c0 //前一級(jí)進(jìn)位

  標(biāo)簽： output look-ahead summation carryout

  上傳時(shí)間： 2017-01-07

  上傳用戶：yyq123456789

• Ripple Adder: 16-bit 全加,半加及ripple adder的設(shè)計(jì)及VHDL程序 Carry Look ahead Adder:4, 16, 32 bits 前置進(jìn)位加法器的設(shè)計(jì)方免費(fèi)下載

  資源簡(jiǎn)介：Ripple Adder: 16-bit 全加,半加及ripple adder的設(shè)計(jì)及VHDL程序 Carry Look ahead Adder:4, 16, 32 bits 前置進(jìn)位加法器的設(shè)計(jì)方案及VHDL程序 Carry Select Adder:16 Bits 進(jìn)位選擇加法器的設(shè)計(jì)方案及VHDL程序

  標(biāo)簽： Adder Ripple ripple Carry

  上傳時(shí)間： 2015-05-13

  上傳用戶：我們的船長(zhǎng)

• flash 16-bit width memory low level driver source code免費(fèi)下載

  資源簡(jiǎn)介：flash 16-bit width memory low level driver source code

  標(biāo)簽： driver memory source flash

  上傳時(shí)間： 2014-01-03

  上傳用戶：gyq

• verilog 16-bit Analogue-Digital Converter免費(fèi)下載

  資源簡(jiǎn)介：verilog 16-bit Analogue-Digital Converter

  標(biāo)簽： Analogue-Digital Converter verilog bit

  上傳時(shí)間： 2013-12-09

  上傳用戶：aappkkee

• verilog Synchronous FIFO. 4 x 16 bit words.免費(fèi)下載

  資源簡(jiǎn)介：verilog Synchronous FIFO. 4 x 16 bit words.

  標(biāo)簽： Synchronous verilog words FIFO

  上傳時(shí)間： 2017-02-18

  上傳用戶：410805624

• verilog code for 8-bit signed integers....its working免費(fèi)下載

  資源簡(jiǎn)介：verilog code for 8-bit signed integers....its working

  標(biāo)簽： integers verilog working signed

  上傳時(shí)間： 2017-03-18

  上傳用戶：zhichenglu

• vhdl code for a 16 bit decoder design免費(fèi)下載

  資源簡(jiǎn)介：vhdl code for a 16 bit decoder design

  標(biāo)簽： decoder design vhdl code

  上傳時(shí)間： 2014-01-21

  上傳用戶：evil

• verilog code for 3 bit sequence detector免費(fèi)下載

  資源簡(jiǎn)介：verilog code for 3 bit sequence detector

  標(biāo)簽： detector sequence verilog code

  上傳時(shí)間： 2017-06-26

  上傳用戶：gdgzhym

• this is the vhdl code of arithmetic and logic unit of 16 bit microprocessor.免費(fèi)下載

  資源簡(jiǎn)介：this is the vhdl code of arithmetic and logic unit of 16 bit microprocessor.

  標(biāo)簽： microprocessor arithmetic logic this

  上傳時(shí)間： 2013-12-07

  上傳用戶：jcljkh

• This is 8bit multiplier VHDL code. It s consist of full adder, ripple carry adder(4bit, 8bit) multip免費(fèi)下載

  資源簡(jiǎn)介：This is 8bit multiplier VHDL code. It s consist of full adder, ripple carry adder(4bit, 8bit) multiplier 8bit, and test bench file. This is a unsigned type.

  標(biāo)簽： adder 8bit multiplier consist

  上傳時(shí)間： 2014-08-21

  上傳用戶：zhangliming420

• this code calculates square root of a 16 bit number免費(fèi)下載

  資源簡(jiǎn)介：this code calculates square root of a 16 bit number

  標(biāo)簽： calculates square number this

  上傳時(shí)間： 2014-01-05

  上傳用戶：change0329

• 16-bit數(shù)的偶數(shù)奇偶校驗(yàn)及階乘運(yùn)算免費(fèi)下載

  資源簡(jiǎn)介：16-bit數(shù)的偶數(shù)奇偶校驗(yàn)及階乘運(yùn)算，用verilog寫

  標(biāo)簽： bit 16 奇偶校驗(yàn) 運(yùn)算

  上傳時(shí)間： 2015-01-29

  上傳用戶：王楚楚

• computes the square root of a 16 bit number in pic16c免費(fèi)下載

  資源簡(jiǎn)介：computes the square root of a 16 bit number in pic16c

  標(biāo)簽： computes square number 16

  上傳時(shí)間： 2015-02-07

  上傳用戶：wangdean1101

• ADS1100 16-bit sigma-delta differential ADC 與 MSP430F413接口設(shè)計(jì)。免費(fèi)下載

  資源簡(jiǎn)介：ADS1100 16-bit sigma-delta differential ADC 與 MSP430F413接口設(shè)計(jì)。

  標(biāo)簽： differential sigma-delta 1100 430F

  上傳時(shí)間： 2013-12-23

  上傳用戶：2404

• A collection of math routines including 8-bit, 16-bit, 32-bit signed and unsigned addition, subtract免費(fèi)下載

  資源簡(jiǎn)介：A collection of math routines including 8-bit, 16-bit, 32-bit signed and unsigned addition, subtraction, multiplication, and division. Very nice code library with heavy in-line documentation! Been looking for multi-byte divide? Here it is.

  標(biāo)簽： bit collection including addition

  上傳時(shí)間： 2015-05-17

  上傳用戶：cursor

• verilog實(shí)現(xiàn)16*16位乘法器免費(fèi)下載

  資源簡(jiǎn)介：verilog實(shí)現(xiàn)16*16位乘法器，帶測(cè)試文件

  標(biāo)簽： verilog 16 乘法器

  上傳時(shí)間： 2013-12-18

  上傳用戶：天誠(chéng)24

• opb_wb verilog code itis very good免費(fèi)下載

  資源簡(jiǎn)介：opb_wb verilog code itis very good

  標(biāo)簽： verilog opb_wb code itis

  上傳時(shí)間： 2014-01-13

  上傳用戶：x4587

• verilog code,about oc8051免費(fèi)下載

  資源簡(jiǎn)介：verilog code,about oc8051

  標(biāo)簽： verilog about code 8051

  上傳時(shí)間： 2014-01-16

  上傳用戶：pompey

• example of some verilog code免費(fèi)下載

  資源簡(jiǎn)介：example of some verilog code

  標(biāo)簽： example verilog code some

  上傳時(shí)間： 2014-01-16

  上傳用戶：change0329

• this is a sensorless fan motor control code .(it use the angle-ahead commutate tech.)免費(fèi)下載

  資源簡(jiǎn)介：this is a sensorless fan motor control code .(it use the angle-ahead commutate tech.)

  標(biāo)簽： angle-ahead sensorless commutate control

  上傳時(shí)間： 2015-03-30

  上傳用戶：aysyzxzm

• <PCMCIA System Architecture 16 Bit PC Cards>電子書籍免費(fèi)下載

  資源簡(jiǎn)介：<PCMCIA System Architecture 16 Bit PC Cards>電子書籍，PCMCIA接口設(shè)計(jì)參考資料。

  標(biāo)簽： Architecture PCMCIA System Cards

  上傳時(shí)間： 2015-04-07

  上傳用戶：liuchee

• Instruction Set Manual for the C166 Family of Infineon 16-Bit Single-Chip Microcontrollers免費(fèi)下載

  資源簡(jiǎn)介：Instruction Set Manual for the C166 Family of Infineon 16-Bit Single-Chip Microcontrollers

  標(biāo)簽： Microcontrollers Instruction Single-Chip Infineon

  上傳時(shí)間： 2015-04-20

  上傳用戶：遠(yuǎn)遠(yuǎn)ssad

• 完整的jpeg encoder verilog code,DCT部分採(cǎi)用1991 IEEE transection paper,利用skew circular convolution來實(shí)現(xiàn)精簡(jiǎn)電路免費(fèi)下載

  資源簡(jiǎn)介：完整的jpeg encoder verilog code,DCT部分採(cǎi)用1991 IEEE transection paper,利用skew circular convolution來實(shí)現(xiàn)精簡(jiǎn)電路

  標(biāo)簽： convolution transection circular encoder

  上傳時(shí)間： 2014-01-20

  上傳用戶：waizhang

• FIR FILTER verilog code免費(fèi)下載

  資源簡(jiǎn)介：FIR FILTER verilog code

  標(biāo)簽： verilog FILTER code FIR

  上傳時(shí)間： 2013-12-17

  上傳用戶：kristycreasy

• 4-7segment led display verilog code. Implemented at Stratix EP1S25 DSP development board.免費(fèi)下載

  資源簡(jiǎn)介：4-7segment led display verilog code. Implemented at Stratix EP1S25 DSP development board.

  標(biāo)簽： Implemented development segment display

  上傳時(shí)間： 2014-01-12

  上傳用戶：水中浮云

• k9f2808 16M x 8 Bit , 8M x 16 Bit NAND Flash Memory免費(fèi)下載

  資源簡(jiǎn)介：k9f2808 16M x 8 Bit , 8M x 16 Bit NAND Flash Memory

  標(biāo)簽： Bit k9f2808 Memory Flash

  上傳時(shí)間： 2015-11-19

  上傳用戶：gaome

• This leon3 design is tailored to the Altera NiosII Startix2 Development board, with 16-bit DDR SDR免費(fèi)下載

  資源簡(jiǎn)介：This leon3 design is tailored to the Altera NiosII Startix2 Development board, with 16-bit DDR SDRAM and 2 Mbyte of SSRAM. As of this time, the DDR interface only works up to 120 MHz. At 130, DDR data can be read but not written. ...

  標(biāo)簽： Development Startix2 tailored Altera

  上傳時(shí)間： 2014-01-19

  上傳用戶：chongcongying

• The 74ALVC16245(74ALVCH16245) is a 16-bit transceiver featuring non-inverting 3-State bus compatibl免費(fèi)下載

  資源簡(jiǎn)介：The 74ALVC16245(74ALVCH16245) is a 16-bit transceiver featuring non-inverting 3-State bus compatible outputs in both send and receive directions.

  標(biāo)簽： 16245 non-inverting transceiver featuring

  上傳時(shí)間： 2013-12-21

  上傳用戶：風(fēng)之驕子

• Abstract: By using gateway systems on large 32-bit platforms, networks of small, 8- and 16-bit mic免費(fèi)下載

  資源簡(jiǎn)介：Abstract: By using gateway systems on large 32-bit platforms, networks of small, 8- and 16-bit microcontrollers can be monitored and controlled over the Internet. With embedded Linux, these gateways are easily moved from full-blown host ...

  標(biāo)簽： bit platforms Abstract networks

  上傳時(shí)間： 2014-01-05

  上傳用戶：kytqcool