Xilinx clock module design
資源簡介:Xilinx clock module design
上傳時間: 2013-12-31
上傳用戶:qoovoop
資源簡介:Xilinx Synthesis & Simulation design Guide
上傳時間: 2013-12-26
上傳用戶:xsnjzljj
資源簡介:benq gsm module design guide
上傳時間: 2017-04-11
上傳用戶:zhengjian
資源簡介:本文首次設計并驗證了基于macom三合一芯片設計的光模塊電路,該電路旨在提供一種滿足SFF-8472中規定的數字診斷功能的低成本SFP+模塊。電路采用激光器驅動、限幅放大器、控制器以及時鐘恢復單元集成的單芯片,在保證高精度數字診斷功能基礎上,實現了低成本高可靠...
上傳時間: 2022-04-03
上傳用戶:
資源簡介:研究一種智能掃地機器人。從硬件系統控制模塊設計到主要技術調試進行了較詳細的闡述。以STM32單片機為控制核心與電機驅動、紅外線路徑識別模塊等相互協調應用。進行電路搭建和程序編寫。實現了智能掃地機器人紅外線避障和自動掃地功能,其清掃面積能達到約70%,...
上傳時間: 2022-03-26
上傳用戶:
資源簡介:Xilinx FPGA design Tutorial
上傳時間: 2013-08-07
上傳用戶:一諾88
資源簡介:fpga design flow from Xilinx
上傳時間: 2013-08-29
上傳用戶:talenthn
資源簡介: 中文版詳情瀏覽:http://www.elecfans.com/emb/fpga/20130715324029.html Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture The Xilinx? UltraScale? architecture delivers unprecedented lev...
上傳時間: 2013-11-13
上傳用戶:瓦力瓦力hong
資源簡介: 中文版詳情瀏覽:http://www.elecfans.com/emb/fpga/20130715324029.html Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture The Xilinx? UltraScale? architecture delivers unprecedented lev...
上傳時間: 2013-11-21
上傳用戶:wxqman
資源簡介:-- PCI Target Interface design for XC73144 -- -- Synopsys VHDL Solution using Xilinx XC7000 Library
上傳時間: 2015-04-25
上傳用戶:bruce
資源簡介:A Huffman implementation reference design in both VHDL and Verilog is provided by the Xilinx
上傳時間: 2015-07-07
上傳用戶:cooran
資源簡介:Seraphim Wireless DMX512 module Reference design
上傳時間: 2013-12-19
上傳用戶:天誠24
資源簡介:* This a software code module for a time-of-day clock object. * The clock may be fixed 12-hour, fixed 24-hour, or dynamically * configurable between these two types. clock data can be accessed * as a binary number representing the num...
上傳時間: 2013-12-07
上傳用戶:llandlu
資源簡介:嵌入式文檔:Xilinx EDK 實驗教程1: Simple Hardware design
上傳時間: 2015-09-20
上傳用戶:nanfeicui
資源簡介:THIS A GENERIC CHARACTER module TEST PROGRAM design BY JAMES MCU =>8051
上傳時間: 2015-11-11
上傳用戶:zgu489
資源簡介:fpga design flow from Xilinx
上傳時間: 2015-12-09
上傳用戶:luopoguixiong
資源簡介:Xilinx SPARTAN3E design guide line
上傳時間: 2014-01-24
上傳用戶:songyue1991
資源簡介:Olympic clock circuit schematic design reference,maybe you just search it now,haha1
上傳時間: 2016-03-16
上傳用戶:it男一枚
資源簡介:THIS design IS PROVIDED TO YOU "AS IS". Xilinx MAKES AND YOU RECEIVE NO WARRANTIES OR CONDITIONS, EXPRESS, IMPLIED, STATUTORY OR OTHERWISE, AND Xilinx SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, OR FI...
上傳時間: 2016-03-21
上傳用戶:1427796291
資源簡介:Xilinx reference design for 1553B BUS analyer using
上傳時間: 2013-12-01
上傳用戶:bibirnovis
資源簡介:Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT. 3. Output pins: OUT [15:0]. 4. Input signals generated from test pattern are latched in one cycle and are synchronized at clock rising...
上傳時間: 2013-12-13
上傳用戶:himbly
資源簡介:Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT. 3. Output pins: OUT [15:0]. 4. Input signals generated from test pattern are latched in one cycle and are synchronized at clock rising...
上傳時間: 2014-01-20
上傳用戶:三人用菜
資源簡介:Advanced HDL design Training On Xilinx FPGA
上傳時間: 2014-01-10
上傳用戶:hoperingcong
資源簡介:clock for any purpose of use by any design
上傳時間: 2014-01-06
上傳用戶:semi1981
資源簡介:Pure hardware JPEG Encoder design. Package includes vhdl source code, test bench, detail design document. Written in VHDL. Verified on Xilinx XC4VLX25. Rncode 320x240 bmp picture in 3ms at 50 quality, 100Mhz clock.
上傳時間: 2013-12-15
上傳用戶:王者A
資源簡介:design a module (ROM)in design simple CPU
上傳時間: 2013-12-04
上傳用戶:520
資源簡介:design electronic clock by DS12887, file hex
上傳時間: 2013-12-19
上傳用戶:wangdean1101
資源簡介:Network design For automated design using zigbee module
上傳時間: 2017-08-08
上傳用戶:宋桃子
資源簡介:Example code for the control design module of LabView and for the Control Primer text
上傳時間: 2013-11-28
上傳用戶:yy541071797
資源簡介:Xilinx FPGA design Tutorial
上傳時間: 2014-02-12
上傳用戶:stvnash