The C8051F020/1/2/3 devices are fully integrated mixed-signal System-on-a-CHip MCUs with 64 digital I/O pins (C8051F020/2) or 32 digital I/O pins (C8051F021/3). Highlighted features are listed below; refer to Table 1.1 for specific product feature selection.
標(biāo)簽： C8051F020 數(shù)據(jù)手冊
上傳時(shí)間： 2013-11-08
上傳用戶：lwq11
The LPC2292/2294 microcontrollers are based on a 16/32-bit ARM7TDMI-S CPU with real-time emulation and embedded trace support, together with 256 kB of embedded high-speed flash memory. A 128-bit wide memory interface and a unique accelerator architecture enable 32-bit code execution at the maximum clock rate. For critical code size applications, the alternative 16-bit Thumb mode reduces code by more than 30 pct with minimal performance penalty. With their 144-pin package, low power consumption, various 32-bit timers, 8-channel 10-bit ADC, 2/4 (LPC2294) advanced CAN channels, PWM channels and up to nine external interrupt pins these microcontrollers are particularly suitable for automotive and industrial control applications as well as medical systems and fault-tolerant maintenance buses. The number of available fast GPIOs ranges from 76 (with external memory) through 112 (single-CHip). With a wide range of additional serial communications interfaces, they are also suited for communication gateways and protocol converters as well as many other general-purpose applications. Remark: Throughout the data sheet, the term LPC2292/2294 will apply to devices with and without the /00 or /01 suffix. The suffixes /00 and /01 will be used to differentiate from other devices only when necessary.
標(biāo)簽： lpc datasheet 2292 2294
上傳時(shí)間： 2014-12-30
上傳用戶：aysyzxzm
Keil C51 V8 專業(yè)開發(fā)工具（PK51） PK51是為8051系列單片機(jī)所設(shè)計(jì)的開發(fā)工具，支持所有8051系列衍生產(chǎn)品，，支持帶擴(kuò)展存儲(chǔ)器和擴(kuò)展指令集（例如Dallas390/5240/400,Philips 51MX,Analog Devices MicroConverters）的新設(shè)備,以及支持很多公司的一流的設(shè)備和IP內(nèi)核,比如Analog Devices, Atmel, Cypress Semiconductor, Dallas Semiconductor, Goal, Hynix, Infineon, Intel, NXP(founded by Philips), OKI, Silicon Labs,SMSC, STMicroeleectronics,Synopsis, TDK, Temic, Texas Instruments,Winbond等。 通過PK51專業(yè)級開發(fā)工具，可以輕松地了解8051的On-CHip peripherals與及其它關(guān)鍵特性。 The PK51專業(yè)級開發(fā)工具包括… l μVision Ø 集成開發(fā)環(huán)境 Ø 調(diào)試器 Ø 軟件模擬器 l Keil 8051擴(kuò)展編譯工具 Ø AX51宏匯編程序 Ø ANSI C編譯工具 Ø LX51 連接器 Ø OHX51 Object-HEX 轉(zhuǎn)換器 l Keil 8051編譯工具 Ø A51宏匯編程序 Ø C51 ANSI C編譯工具 Ø BL51 代碼庫連接器 Ø OHX51 Object-HEX 轉(zhuǎn)換器 Ø OC51 集合目標(biāo)轉(zhuǎn)換器 l 目標(biāo)調(diào)試器 Ø FlashMON51 目標(biāo)監(jiān)控器 Ø MON51目標(biāo)監(jiān)控器 Ø MON390 (Dallas 390)目標(biāo)監(jiān)控器 Ø MONADI (Analog Devices 812)目標(biāo)監(jiān)控器 Ø ISD51 在系統(tǒng)調(diào)試 l RTX51微實(shí)時(shí)內(nèi)核 你應(yīng)該考慮PK51開發(fā)工具包,如果你… l 需要用8051系列單片機(jī)來開發(fā) l 需要開發(fā) Dallas 390 或者 Philips 51MX代碼 l 需要用C編寫代碼 l 需要一個(gè)軟件模擬器或是沒有硬件仿真器 l 需要在單芯片上基于小實(shí)時(shí)內(nèi)核創(chuàng)建復(fù)雜的應(yīng)用
上傳時(shí)間： 2013-10-30
上傳用戶：yy_cn
LVDS、xECL、CML（低電壓差分信號傳輸、發(fā)射級耦合邏輯、電流模式邏輯）………4多點(diǎn)式低電壓差分信號傳輸(M-LVDS) ……………………………………………………8數(shù)字隔離器 ………………………………………………………………………………10RS-485/422 …………………………………………………………………………………11RS-232………………………………………………………………………………………13UART（通用異步收發(fā)機(jī)）…………………………………………………………………16CAN（控制器局域網(wǎng)）……………………………………………………………………18FlatLinkTM 3G ………………………………………………………………………………19SerDes（串行G 比特收發(fā)機(jī)及LVDS）……………………………………………………20DVI（數(shù)字視頻接口）/PanelBusTM ………………………………………………………22TMDS（最小化傳輸差分信號） …………………………………………………………24USB 集線器控制器及外設(shè)器件 …………………………………………………………25USB 接口保護(hù) ……………………………………………………………………………26USB 電源管理 ……………………………………………………………………………27PCI Express® ………………………………………………………………………………29PCI 橋接器 …………………………………………………………………………………33卡總線 (CardBus) 電源開關(guān) ………………………………………………………………341394 (FireWire®, 火線®) ……………………………………………………………………36GTLP (Gunning Transceiver Logic Plus，體效應(yīng)收發(fā)機(jī)邏輯+) ………………………………39VME（Versa Module Eurocard）總線 ………………………………………………………41時(shí)鐘分配電路 ……………………………………………………………………………42交叉參考指南 ……………………………………………………………………………43器件索引 …………………………………………………………………………………47技術(shù)支持 …………………………………………………………………………………48 德州儀器（TI）為您提供了完備的接口解決方案，使得您的產(chǎn)品別具一格，并加速了產(chǎn)品面市。憑借著在高速、復(fù)合信號電路、系統(tǒng)級芯片 (system-on-a-CHip ) 集成以及先進(jìn)的產(chǎn)品開發(fā)工藝方面的技術(shù)專長，我們將能為您提供硅芯片、支持工具、軟件和技術(shù)文檔，使您能夠按時(shí)的完成并將最佳的產(chǎn)品推向市場，同時(shí)占據(jù)一個(gè)具有競爭力的價(jià)格。本選擇指南為您提供與下列器件系列有關(guān)的設(shè)計(jì)考慮因素、技術(shù)概述、產(chǎn)品組合圖示、參數(shù)表以及資源信息：
上傳時(shí)間： 2013-10-21
上傳用戶：Jerry_Chow
介紹了SoPC（System on a Programmable CHip）系統(tǒng)的概念和特點(diǎn)，給出了基于PLB總線的異步串行通信（UART）IP核的硬件設(shè)計(jì)和實(shí)現(xiàn)。通過將設(shè)計(jì)好的UART IP核集成到SoPC系統(tǒng)中加以驗(yàn)證，證明了所設(shè)計(jì)的UART IP核可以正常工作。該設(shè)計(jì)方案為其他基于SoPC系統(tǒng)IP核的開發(fā)提供了一定的參考。
上傳時(shí)間： 2013-11-12
上傳用戶：894448095
The NXP LPC314x combine a 270 MHz ARM926EJ-S CPU core, High-speed USB 2.0OTG, 192 KB SRAM, NAND flash controller, flexible external bus interface, three channel10-bit A/D, and a myriad of serial and parallel interfaces in a single CHip targeted atconsumer, industrial, medical, and communication markets. To optimize system powerconsumption, the LPC314x have multiple power domains and a very flexible ClockGeneration Unit (CGU) that provides dynamic clock gating and scaling.
上傳時(shí)間： 2013-10-11
上傳用戶：yuchunhai1990
The LPC1850/30/20/10 are ARM Cortex-M3 based microcontrollers for embeddedapplications. The ARM Cortex-M3 is a next generation core that offers systemenhancements such as low power consumption, enhanced debug features, and a highlevel of support block integration.The LPC1850/30/20/10 operate at CPU frequencies of up to 150 MHz. The ARMCortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture withseparate local instruction and data buses as well as a third bus for peripherals. The ARMCortex-M3 CPU also includes an internal prefetch unit that supports speculativebranching.The LPC1850/30/20/10 include up to 200 kB of on-CHip SRAM data memory, a quad SPIFlash Interface (SPIFI), a State Configuration Timer (SCT) subsystem, two High-speedUSB controllers, Ethernet, LCD, an external memory controller, and multiple digital andanalog peripherals.
標(biāo)簽： Cortex-M 1850 LPC 內(nèi)核微控制器
上傳時(shí)間： 2014-12-31
上傳用戶：zhuoying119
On the LPC13xx, programming, erasure and re-programming of the on-CHip flash can be performed using In-System Programming (ISP) via the UART serial port, and also, can be performed using In-Application Programming (IAP) calls directed by the end-user code. For In-System Programming (ISP) via the UART serial port, the ISP command handler (resides in the bootloader) allows erasure of one or more sector (s) of the on-CHip flash memory.
標(biāo)簽： 1300 LPC 勘誤 數(shù)據(jù)手冊
上傳時(shí)間： 2013-12-13
上傳用戶：lmq0059
The NXP LPC315x combine an 180 MHz ARM926EJ-S CPU core, High-speed USB 2.0OTG, 192 KB SRAM, NAND flash controller, flexible external bus interface, an integratedaudio codec, Li-ion charger, Real-Time Clock (RTC), and a myriad of serial and parallelinterfaces in a single CHip targeted at consumer, industrial, medical, and communicationmarkets. To optimize system power consumption, the LPC315x have multiple powerdomains and a very flexible Clock Generation Unit (CGU) that provides dynamic clockgating and scaling.The LPC315x is implemented as multi-CHip module with two side-by-side dies, one fordigital fuctions and one for analog functions, which include a Power Supply Unit (PSU),audio codec, RTC, and Li-ion battery charger.
上傳時(shí)間： 2014-01-17
上傳用戶：Altman
Introduction to Xilinx Packaging Electronic packages are interconnectable housings for semiconductor devices. The major functions of the electronic packages are to provide electrical interconnections between the IC and the board and to efficiently remove heat generated by the device. Feature sizes are constantly shrinking, resulting in increased number of transistors being packed into the device. Today's submicron technology is also enabling large-scale functional integration and system-on-a-CHip solutions. In order to keep pace with these new advancements in silicon technologies, semiconductor packages have also evolved to provide improved device functionality and performance. Feature size at the device level is driving package feature sizes down to the design rules of the early transistors. To meet these demands, electronic packages must be flexible to address high pin counts, reduced pitch and form factor requirements. At the same time,packages must be reliable and cost effective.
上傳時(shí)間： 2013-11-21
上傳用戶：不懂夜的黑
蟲蟲下載站版權(quán)所有 京ICP備2021023401號-1
