這是MFC Windows程序設(shè)計(jì)（第2版），書上的代碼。第14章，計(jì)時(shí)器，CLock應(yīng)用程序，空閑處理的編程，供大家參考。
標(biāo)簽： Windows MFC 程序設(shè)計(jì)
上傳時(shí)間： 2013-12-24
上傳用戶：wangyi39
三星程式范例，八位元的 timer, counter, serial I/O, CLock switching, power down, key scan, A to D, software generated LCD control, ...
上傳時(shí)間： 2013-12-17
上傳用戶：zhengzg
Pure hardware JPEG Encoder design. Package includes vhdl source code, test bench, detail design document. Written in VHDL. Verified on Xilinx XC4VLX25. Rncode 320x240 bmp picture in 3ms at 50 quality, 100Mhz CLock.
標(biāo)簽： design hardware includes Encoder
上傳時(shí)間： 2013-12-15
上傳用戶：王者A
本模擬I2C軟件包包含了I2C操作的底層子程序，使用前要定義好SCL和SDA。在標(biāo)準(zhǔn)8051模式(12 CLock)下,對(duì)主頻要求是不高于12MHz
上傳時(shí)間： 2013-12-27
上傳用戶：330402686
This manual describes SAMSUNG s S3C2410A 16/32-bit RISC microprocessor. This product is designed to provide hand-held devices and general applications with cost-effective, low-power, and high-performance micro-controller solution in small die size. To reduce total system cost, the S3C2410A includes the following components separate 16KB Instruction and 16KB Data Cache, MMU to handle virtual memory management, LCD Controller (STN & TFT), NAND Flash Boot Loader, System Manager (chip select logic and SDRAM Controller), 3-ch UART, 4-ch DMA, 4-ch Timers with PWM, I/O Ports, RTC, 8-ch 10-bit ADC and Touch Screen Interface, IIC-BUS Interface, IIS-BUS Interface, USB Host, USB Device, SD Host & Multi-Media Card Interface, 2-ch SPI and PLL for CLock generation.
標(biāo)簽： This microprocessor describes S3C2410A
上傳時(shí)間： 2013-11-30
上傳用戶：GavinNeko
In communication systems channel poses an important role. channels can convolve many different kind of distortions to our information. In perticular wireless channels multipath distortion is sevear. and more sevear is such distortion is random. To handle this, multipath affected channels require Equalizers at receaver end. such equalizer uses different learning Algorithms for identifying channels continuously. This project is VHDL implementation of LMS learning algorithm with pipelined architecture. so this implementation can work with higher data rates with less CLock speed requirments and so with less power consumpiton It uses Fixed point arithmatic blocks for filtering so suitable for coustom asic.
標(biāo)簽： communication important different channels
上傳時(shí)間： 2013-12-08
上傳用戶：litianchu
The emphasis of this book is on real-time application of Synopsys tools, used to combat various problems seen at VDSM geometries. Readers will be exposed to an effective design methodology for handling complex, submicron ASIC designs. Significance is placed on HDL coding styles, synthesis and optimization, dynamic simulation, formal verification, DFT scan insertion, links to layout, physical synthesis, and static timing analysis. At each step, problems related to each phase of the design flow are identified, with solutions and work-around described in detail. In addition, crucial issues related to layout, which includes CLock tree synthesis and back-end integration (links to layout) are also discussed at length. Furthermore, the book contains in-depth discussions on the basics of Synopsys technology libraries and HDL coding styles, targeted towards optimal synthesis solution.
標(biāo)簽： application real-time Synopsys emphasis
上傳時(shí)間： 2017-07-05
上傳用戶：waitingfy
msp43022*4單片機(jī)模塊的測(cè)試程序，包括IO口、CLock、flash、模數(shù)轉(zhuǎn)換、WDT等。
標(biāo)簽： 43022 msp 單片機(jī)模塊 測(cè)試程序
上傳時(shí)間： 2017-07-11
上傳用戶：chongcongying
此程序的功能為DM12864液晶屏串行顯示，通過(guò)CS DATA CLock 這三根線就可以實(shí)現(xiàn)顯示，節(jié)省了寶貴的I/O資源。
上傳時(shí)間： 2014-11-29
上傳用戶：熊少鋒
Code Warrior 4.7 Target : MC9S12XS128 Crystal: 16.000Mhz ============================================ 本程序主要包括以下功能： 1.設(shè)定系統(tǒng)工作在xxMHZ bus CLock時(shí)鐘下 2.測(cè)試FREESCALEMC9SXS128開(kāi)發(fā)板超頻性能: 如果LED閃爍，說(shuō)明芯片正常工作 否則，說(shuō)明芯片沒(méi)有正常工作，請(qǐng)檢查系統(tǒng)設(shè)計(jì)
標(biāo)簽： Warrior Crystal 16.000 Target
上傳時(shí)間： 2013-12-13
上傳用戶：lizhizheng88
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