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Cycle

基于Contourlet域HMT模型的Cycle Spinning去噪方法

為了提高圖像去噪效果，提出了基于Contourlet域HMT模型的Cycle Spinning去噪方法。首先將待去噪圖像進行循環平移，使用Contourlet域HMT模型對平移后的圖像進行降噪處理，然后將降噪后的圖像進行循環反平移，最后將不同循環平移量下的降噪圖像進行平均處理，以減少去噪后圖像的失真。實驗結果表明，該方法不僅可以提高降噪后圖像峰值信噪比，而且可以提高降噪后圖像的視覺效果。

標簽： Contourlet Spinning Cycle HMT

上傳時間： 2014-12-23

上傳用戶：ddddddos
Cycle slip probability of the phase unrapping algorithm

Cycle slip probability of the phase unrapping algorithm

標簽： probability algorithm unrapping Cycle

上傳時間： 2013-12-09

上傳用戶：wpt
IEEE軟件生命周期過程管理標準 IEEE Standard for Information Technology - Software Life Cycle

IEEE軟件生命周期過程管理標準 IEEE Standard for Information Technology - Software Life Cycle

標簽： IEEE Information Technology Standard

上傳時間： 2014-11-11

上傳用戶：xlcky
ADSP-BF535 Blackfin® Processor Multi-Cycle Instructions and Latencies

ADSP-BF535 Blackfin® Processor Multi-Cycle Instructions and Latencies

標簽： Instructions Multi-Cycle Processor Latencies

上傳時間： 2013-12-20

上傳用戶：2467478207
show 0-F Cycle by Cycle in ARM7

show 0-F Cycle by Cycle in ARM7

標簽： Cycle show ARM7 by

上傳時間： 2016-01-11

上傳用戶：yph853211
This demo shows the use of the PWM block in generating the pulse waveform whose duty Cycle is changi

This demo shows the use of the PWM block in generating the pulse waveform whose duty Cycle is changing regularly. The PWM waveform period is variable, while the width of the pulse remains constant.

標簽： the generating waveform changi

上傳時間： 2014-01-15

上傳用戶：kr770906
VHDL code for a clock divider by 27 circuit with a resulting waveform with 50％ duty Cycle..

VHDL code for a clock divider by 27 circuit with a resulting waveform with 50％ duty Cycle..

標簽： with resulting waveform circuit

上傳時間： 2014-01-05

上傳用戶：woshini123456
CRC碼產生器與校驗器程序 Features ： Executes in one clock Cycle per data word Any polynomial from 4 to 32 b

CRC碼產生器與校驗器程序 Features ： Executes in one clock Cycle per data word Any polynomial from 4 to 32 bits Any data width from 1 to 256 bits Any initialization value Synchronous or asynchronous reset

標簽： polynomial Features Executes clock

上傳時間： 2013-12-18

上傳用戶：Ants
Ring register[1 from 8] which seven speeds. The result is presented on 8 LEDs. After every Cycle, sp

Ring register[1 from 8] which seven speeds. The result is presented on 8 LEDs. After every Cycle, speed grows. The process starts again after last 8 Cycle.

標簽： presented register result speeds

上傳時間： 2017-03-24

上傳用戶：llandlu
Write a program to decide if a graph has a Cycle or not. The given graph can be a directed or undire

Write a program to decide if a graph has a Cycle or not. The given graph can be a directed or undirected graph, which is indicated at the time of reading the input (0 for directed graph and 1 for undirected graphs). The input is given as an adjacency list.

標簽： graph directed program decide

上傳時間： 2013-12-23

上傳用戶：cursor

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Cycle

基于Contourlet域HMT模型的Cycle Spinning去噪方法

Cycle slip probability of the phase unrapping algorithm

IEEE軟件生命周期過程管理標準 IEEE Standard for Information Technology - Software Life Cycle

ADSP-BF535 Blackfin® Processor Multi-Cycle Instructions and Latencies

show 0-F Cycle by Cycle in ARM7

This demo shows the use of the PWM block in generating the pulse waveform whose duty Cycle is changi

VHDL code for a clock divider by 27 circuit with a resulting waveform with 50％ duty Cycle..

CRC碼產生器與校驗器程序 Features ： Executes in one clock Cycle per data word Any polynomial from 4 to 32 b

Ring register[1 from 8] which seven speeds. The result is presented on 8 LEDs. After every Cycle, sp

Write a program to decide if a graph has a Cycle or not. The given graph can be a directed or undire