超聲波傳感器適用于對(duì)大幅的平面進(jìn)行靜止測(cè)距。普通的超聲波傳感器測(cè)距范圍大概是 2cm~450cm，分辨率3mm（淘寶賣家說(shuō)的，筆者測(cè)試環(huán)境沒(méi)那么好，個(gè)人實(shí)測(cè)比較穩(wěn)定的 距離10cm~2m 左右，超過(guò)此距離就經(jīng)常有偶然不準(zhǔn)確的情況發(fā)生了，當(dāng)然不排除筆者技術(shù) 問(wèn)題。） 測(cè)試對(duì)象是淘寶上面最便宜的SRF-04 超聲波傳感器，有四個(gè)腳：5v 電源腳（Vcc），觸發(fā)控制端（Trig），接收端（Echo），地端（GND） 附:SRF 系列超聲波傳感器參數(shù)比較 模塊工作原理： 采用IO 觸發(fā)測(cè)距，給至少10us 的高電平信號(hào)； 模塊自動(dòng)發(fā)送8個(gè)40KHz 的方波，自動(dòng)檢測(cè)是否有信號(hào)返回； 有信號(hào)返回，通過(guò)IO 輸出一高電平，高電平持續(xù)的時(shí)間就是超聲波從發(fā)射到返回的時(shí)間．測(cè)試距離=(高電平時(shí)間*聲速(340m/s))/2; 電路連接方法 Arduino 程序例子： constintTrigPin = 2; constintEchoPin = 3; floatcm; voidsetup() { Serial.begin(9600); pinMode(TrigPin, OUTPUT); pinMode(EchoPin, INPUT); } voidloop() { digitalWrite(TrigPin, LOW); //低高低電平發(fā)一個(gè)短時(shí)間脈沖去TrigPin delayMicroseconds(2); digitalWrite(TrigPin, HIGH); delayMicroseconds(10); digitalWrite(TrigPin, LOW); cm = pulseIn(EchoPin, HIGH) / 58.0; //將回波時(shí)間換算成cm cm = (int(cm * 100.0)) / 100.0; //保留兩位小數(shù) Serial.print(cm); Serial.print("cm"); Serial.println(); delay(1000); }
上傳時(shí)間： 2013-10-18
上傳用戶：星仔
As businesses and consumers expect more fromportable electronics, the FPGA industry has beencompelled to re-think how it serves these low-power,cost-sensitive markets. Application classes like
上傳時(shí)間： 2013-11-08
上傳用戶：immanuel2006
Abstract: Designers who must interface 1-Wire temperature sensors with Xilinx field-programmable gate arrays(FPGAs) can use this reference design to drive a DS28EA00 1-Wire slave device. The downloadable softwarementioned in this document can also be used as a starting point to connect other 1-Wire slave devices. The systemimplements a 1-Wire master connected to a UART and outputs temperature to a PC from the DS28EA00 temperaturesensor. In addition, high/low alarm outputs are displayed from the DS28EA00 PIO pins using LEDs.
標(biāo)簽： PicoBlaze Create Master Xilinx
上傳時(shí)間： 2013-11-12
上傳用戶：大三三
HDB3(High Density Bipolar三階高密度雙極性)碼是在AMI碼的基礎(chǔ)上改進(jìn)的一種雙極性歸零碼，它除具有AMI碼功率譜中無(wú)直流分量，可進(jìn)行差錯(cuò)自檢等優(yōu)點(diǎn)外，還克服了AMI碼當(dāng)信息中出現(xiàn)連“0”碼時(shí)定時(shí)提取困難的缺點(diǎn)，而且HDB3碼頻譜能量主要集中在基波頻率以下，占用頻帶較窄，是ITU-TG.703推薦的PCM基群、二次群和三次群的數(shù)字傳輸接口碼型,因此HDB3碼的編解碼就顯得極為重要了[1]。目前，HDB3碼主要由專用集成電路及相應(yīng)匹配的外圍中小規(guī)模集成芯片來(lái)實(shí)現(xiàn)，但集成程度不高，特別是位同步提取非常復(fù)雜，不易實(shí)現(xiàn)。隨著可編程器件的發(fā)展，這一難題得到了很好地解決。
上傳時(shí)間： 2013-11-01
上傳用戶：lindor
This application note shows how to achieve low-cost, efficient serial configuration for Spartan FPGA designs. The approachrecommended here takes advantage of unused resources in a design, thereby reducing the cost, part count, memory size,and board space associated with the serial configuration circuitry. As a result, neither processor nor PROM needs to be fullydedicated to performing Spartan configuration.In particular, information is provided on how the idle processing time of an on-board controller can be used to loadconfiguration data from an off-board source. As a result, it is possible to upgrade a Spartan design in the field by sending thebitstream over a network.
標(biāo)簽： Spartan XAPP FPGA 098
上傳時(shí)間： 2013-11-01
上傳用戶：wojiaohs
The CoolRunner-II CPLD is a highly uniform family of fast, low-power devices. Theunderlying architecture is a traditional CPLD architecture, combining macrocells intofunction blocks interconnected with a global routing matrix, the Xilinx AdvancedInterconnect Matrix (AIM). The function blocks use a PLA configuration that allowsall product terms to be routed and shared among any of the macrocells of the functionblock.
上傳時(shí)間： 2013-11-03
上傳用戶：1037540470
Xilinx Next Generation 28 nm FPGA Technology Overview Xilinx has chosen 28 nm high-κ metal gate (HKMG) highperformance,low-power process technology and combined it with a new unified ASMBL™ architecture to create a new generation of FPGAs that offer lower power and higher performance. These devices enable unprecedented levels of integration and bandwidth and provide system architects and designers a fully programmable alternative to ASSPs and ASICs.
上傳時(shí)間： 2013-12-07
上傳用戶：bruce
WP369可擴(kuò)展式處理平臺(tái)-各種嵌入式系統(tǒng)的理想解決方案 ：Delivering unrivaled levels of system performance,flexibility, scalability, and integration to developers,Xilinx's architecture for a new Extensible Processing Platform is optimized for system power, cost, and size. Based on ARM's dual-core Cortex™-A9 MPCore processors and Xilinx’s 28 nm programmable logic,the Extensible Processing Platform takes a processor-centric approach by defining a comprehensive processor system implemented with standard design methods. This approach provides Software Developers a familiar programming environment within an optimized, full featured,powerful, yet low-cost, low-power processing platform.
標(biāo)簽： 369 WP 擴(kuò)展式 處理平臺(tái)
上傳時(shí)間： 2013-10-18
上傳用戶：cursor
波長(zhǎng)信號(hào)的解調(diào)是實(shí)現(xiàn)光纖光柵傳感網(wǎng)絡(luò)的關(guān)鍵，基于現(xiàn)有的光纖光柵傳感器解調(diào)方法，提出一種基于FPGA的雙匹配光纖光柵解調(diào)方法，此系統(tǒng)是一種高速率、高精度、低成本的解調(diào)系統(tǒng)，并且通過(guò)引入雙匹配光柵有效地克服了雙值問(wèn)題同時(shí)擴(kuò)大了檢測(cè)范圍。分析了光纖光柵的測(cè)溫原理并給出了該方案軟硬件設(shè)計(jì)，綜合考慮系統(tǒng)的解調(diào)精度和FPGA的處理速度給出了基于拉格朗日的曲線擬合算法。 Abstract: Sensor is one of the most important application of the fiber grating. Wavelength signal demodulating is the key techniques to carry out fiber grating sensing network， based on several existing methods of fiber grating sensor demodulation inadequate， a two-match fiber grating demodulation method was presented. This system is a high-speed， high precision， low-cost demodulation system. And by introducing a two-match grating effectively overcomes the problem of double value while expands the scope of testing. This paper analyzes the principle of fiber Bragg grating temperature and gives the software and hardware design of the program. Considering the system of demodulation accuracy and processing speed of FPGA，this paper gives the curve fitting algorithm based on Lagrange.
標(biāo)簽： FPGA 光纖光柵 解調(diào)系統(tǒng)
上傳時(shí)間： 2013-10-10
上傳用戶：zxc23456789
【摘要】本文結(jié)合作者多年的印制板設(shè)計(jì)經(jīng)驗(yàn)，著重印制板的電氣性能，從印制板穩(wěn)定性、可靠性方面，來(lái)討論多層印制板設(shè)計(jì)的基本要求。【關(guān)鍵詞】印制電路板；表面貼裝器件；高密度互連；通孔【Key words】Printed Circuit Board；Surface Mounting Device；High Density Interface；Via一．概述印制板（PCB－Printed Circuit Board）也叫印制電路板、印刷電路板。多層印制板，就是指兩層以上的印制板，它是由幾層絕緣基板上的連接導(dǎo)線和裝配焊接電子元件用的焊盤組成，既具有導(dǎo)通各層線路，又具有相互間絕緣的作用。隨著SMT（表面安裝技術(shù)）的不斷發(fā)展，以及新一代SMD（表面安裝器件）的不斷推出，如QFP、QFN、CSP、BGA（特別是MBGA），使電子產(chǎn)品更加智能化、小型化，因而推動(dòng)了PCB工業(yè)技術(shù)的重大改革和進(jìn)步。自1991年IBM公司首先成功開(kāi)發(fā)出高密度多層板（SLC）以來(lái)，各國(guó)各大集團(tuán)也相繼開(kāi)發(fā)出各種各樣的高密度互連（HDI）微孔板。這些加工技術(shù)的迅猛發(fā)展，促使了PCB的設(shè)計(jì)已逐漸向多層、高密度布線的方向發(fā)展。多層印制板以其設(shè)計(jì)靈活、穩(wěn)定可靠的電氣性能和優(yōu)越的經(jīng)濟(jì)性能，現(xiàn)已廣泛應(yīng)用于電子產(chǎn)品的生產(chǎn)制造中。下面，作者以多年設(shè)計(jì)印制板的經(jīng)驗(yàn)，著重印制板的電氣性能，結(jié)合工藝要求，從印制板穩(wěn)定性、可靠性方面，來(lái)談?wù)劧鄬又瓢逶O(shè)計(jì)的基本要領(lǐng)。
上傳時(shí)間： 2013-10-08
上傳用戶：zhishenglu
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