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The bootloader is stored in the internal boot ROM memory (system memory) of STM32devices. It is programmed by ST during production. Its main task is to download theapplication program to the internal Flash memory through one of the available serialperipherals (USART, CAN, USB, etc.). A communication protocol is defined for each serialinterface, with a compatible command set and sequences
上傳時間： 2014-09-06
上傳用戶：417313137
The MSP-FET430PIF is a Parallel Port interface (does not include target board) that is used to program and debug MSP430 FET tools and test boards through the JTAG interface. This interface is included in our FET tools, but sold without the development board. This interface uses a Parallel PC Port to communicate to the Debugger Software (IAR Kickstart software included) running on the PC. The interface uses the standard 14 pin header to communicate to the MSP430 device using the standard JTAG protocol. The flash memory can be erased and programmed in seconds with only a few keystrokes, and since the MSP430 flash is extremely low power, no external power supply is required. The tool has an integrated software environment and connects directly to the PC which greatly simplifies the set-up and use of the tool. The flash development tool supports development with all MSP430 flash parts. Features MSP430 debugging interface to connect a MSP430-Flash-device to a Parallel port on a PC Supports JTAG debug protocol (NO support for Spy-Bi-Wire (2-wire JTAG) debug protocol, Spy-Bi-Wire (2-wire JTAG) is supported by MSP-FET430UIF) Parallel Port cable and a 14-conductor target cable Full documentation on CD ROM Integrated IAR Kickstart user interface which includes: Assembler Linker Limulator Source-level debugger Limited C-compiler Technical specifications: Backwardly compatable with existing FET tool boards.
上傳時間： 2013-10-26
上傳用戶：fengweihao158@163.com
The MSP-FET430U14 is a powerful flash emulation tool to quickly begin application development on the MSP430 MCU. It includes USB debugging interface used to program and debug the MSP430 in-system through the JTAG interface or the pin saving Spy Bi-Wire (2-wire JTAG) protocol. The flash memory can be erased and programmed in seconds with only a few keystrokes, and since the MSP430 flash is ultra-low power, no external power supply is required. The debugging tool interfaces the MSP430 to the included integrated software environment and includes code to start your design immediately. The MSP-FET430UIF development tools supports development with all MSP430 flash devices
上傳時間： 2013-10-28
上傳用戶：13691535575
keil c51 v9.01此版不是漢化中文版，是英文版來的。ARM發布Keil μVision4集成開發環境(IDE)，用來在微控制器和智能卡設備上創建、仿真和調試嵌入式應用。 μVision4 IDE是為增強開發人員的工作效率設計的，有了它可以更快速、更高效地開發和檢驗程序。通過μVision4 IDE中引入的靈活的窗口管理系統，開發人員可以使用多臺監視器，在可視界面任何地方全面控制窗口放置。 新用戶界面可以更好地利用屏幕空間，更有效地組織多個窗口，為開發應用提供整齊高效的環境。 μVision4在μVision3的成功經驗的基礎上增加了：* System Viewer (系統查看程序)窗口，提供了設備外圍寄存器信息，這些信息可以在System Viewer窗口內部直接更改。* Debug Restore Views (調試恢復視圖)允許保存多個窗口布局，為程序分析迅速選擇最適合的調試視圖。* Multi-Project Workspace(多項目工作空間)為處理多個并存的項目提供了簡化的方法，如引導加載程序和應用程序。* 為基于ARM Cortex 處理器的MCU提供了Data and instruction trace(數據和指令追蹤)功能。* 擴展了Device Simulation(設備仿真)功能以支持許多新設備，如Luminary、NXP和東芝生產的基于ARM Cortex-M3處理器的MCU；Atmel SAM7/9；及新的8051衍生品，如Infineon XC88x和SiLABS 8051Fxx。* 支持許多debug adapter interfaces(調試適配器接口)，包括ADI miDAS Link、Atmel SAM-ICE、Infineon DAS和ST-Link。
上傳時間： 2013-10-31
上傳用戶：qingdou
NXP Semiconductor designed the LPC2400 microcontrollers around a 16-bit/32-bitARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG andembedded Trace. The LPC2400 microcontrollers have 512 kB of on-chip high-speedFlash memory. This Flash memory includes a special 128-bit wide memory interface andaccelerator architecture that enables the CPU to execute sequential instructions fromFlash memory at the maximum 72 MHz system clock rate. This feature is available onlyon the LPC2000 ARM Microcontroller family of products. The LPC2400 can execute both32-bit ARM and 16-bit Thumb instructions. Support for the two Instruction Sets meansEngineers can choose to optimize their application for either performance or code size atthe sub-routine level. When the core executes instructions in Thumb state it can reducecode size by more than 30 % with only a small loss in performance while executinginstructions in ARM state maximizes core performance.
上傳時間： 2013-11-15
上傳用戶：zouxinwang
CCAVR軟件有ISP功能，能過調用STK500完成的，只要設置好參數，在ICCAVR中就可以給芯片編程了，還可以讓程序一編譯完就自動下載到芯片中，相當方便。在Tools->environment options->ISP里設定STK500.exe的路徑。— 用于調用STK500程序。在Tools->In system programming 里Programmer Interface中選中STK500。— 選擇STK500下載方式。在Tools->In system programming 里把Auto Program After Compile 的小勾選上。— 編譯后自動編程。在Tools->In system programming 中還有一些設置項，大家可以根據需要進行相關設置。下面的圖片是操作過程。
上傳時間： 2013-11-17
上傳用戶：joseph
PIC單片機實用教程基礎篇+提高篇 PIC單片機（Peripheral Interface Controller）是一種用來開發的去控制外圍設備的集成電路（IC）。一種具有分散作用（多任務）功能的CPU。與人類相比，大腦就是CPU，PIC 共享的部分相當于人的神經系統。 PIC 單片機是一個小的計算機 PIC單片機有計算功能和記憶內存像CPU并由軟件控制允行。然而，處理能力—存儲器容量卻很有限，這取決于PIC的類型。但是它們的最高操作頻率大約都在20MHz左右，存儲器容量用做寫程序的大約1K—4K字節。 時鐘頻率與掃描程序的時間和執行程序指令的時間有關系。但不能僅以時鐘頻率來判斷程序處理能力，它還隨處理裝置的體系結構改變（1*）。如果是同樣的體系結構，時鐘頻率較高的處理能力會較強。 這里用字來解釋程序容量。用一個指令（2*）表示一個字。通常用字節（3*）來表示存儲器（4*）容量。一個字節有8位，每位由1或0組成。PIC16F84A單片機 的指令由14位構成。當把1K個子轉換成位為：1 x 1,024 x 14 = 14,336位。再轉換為字節為：14,336/(8 x 1,024) = 1.75K。在計算存儲器的容量時，我們規定 1G 字節 = 1,024M 字節, 1M 字節 = 1,024K 字節, 1K 字節= 1,024 字節. 它們不是以1000為倍數，因為這是用二進制計算的緣故。 1*計算機的物理結構,包括組織結構、容量、該計算機的CPU、存儲器以及輸入輸出設備間的互連。經常特指CPU的組織結構,包括它的寄存器、標志、總線、算術邏輯部件、指令譯碼與執行機制以及定時和控制部件。 2*指出某種操作并標識其操作數(如果有操作數的話)的一種語言構造 3*作為一個單位來操作(運算)的一個二進制字符串,通常比計算機的一個字短。 4*處理機內的所有可尋址存儲空間以及用于執行指令的其它內存儲器。 在計算存儲器的容量時，我們規定 1G 字節 = 1,024M 字節, 1M 字節 = 1,024K 字節, 1K 字節= 1,024 字節. 它們不是以1000為倍數，因為這是用二進制計算的緣故。 用PIC單片機使電路做的很小巧變得可能。 因為PIC單片機可以把計算部分、內存、輸入和輸出等都做在一個芯片內。所以她工作起來效率很高、功能也自由定義還可以靈活的適應不同的控制要求，而不必去更換不同的IC。這樣電路才有可能做的很小巧。
上傳時間： 2013-10-15
上傳用戶：sxdtlqqjl
The CAT28LV64 is a low voltage, low power, CMOS Parallel EEPROM organized as 8K x 8−bits. It requires a simple interface for in−system programming. On−chip address and data latches, self−timed write cycle with auto−clear and VCC power up/down write protection eliminate additional timing and protection hardware. DATA Polling and Toggle status bit signal the start and end of the self−timed write cycle. Additionally, the CAT28LV64 features hardware and software write protection.
上傳時間： 2013-11-16
上傳用戶：浩子GG
The CAT25128 is a 128−Kb Serial CMOS EEPROM device internally organized as 16Kx8 bits. This features a 64−byte page write buffer and supports the Serial Peripheral Interface (SPI) protocol. The device is enabled through a Chip Select (CS) input. In addition, the required bus signals are clock input (SCK), data input (SI) and data output (SO) lines. The HOLD input may be used to pause any serial communication with the CAT25128 device. The device featuressoftware and hardware write protection, including partial as well as full array protection.
上傳時間： 2013-11-15
上傳用戶：fklinran
CAT5110/18/19/23/24/25 linear-taper digitally programmable potentiometers perform the same function as a mechanical potentiometer or a variable resistor. These devices consist of a fixed resistor and a wiper contact with 32-tap points that are digitally controlled through a2-wire up/down serial interface.
上傳時間： 2013-11-22
上傳用戶：541657925
