關(guān)于FPGA流水線設(shè)計(jì)的論文 This work investigates the use of very deep pipelines for implementing circuits in FPGAs, where each pipeline stage is limited to a single FPGA logic element (LE). The architecture and VHDL design of a parameterized integer array Multiplier is presented and also an IEEE 754 compliant 32-bit floating-point Multiplier. We show how to write VHDL cells that implement such approach, and how the array Multiplier architecture was adapted. Synthesis and simulation were performed for Altera Apex20KE devices, although the VHDL code should be portable to other devices. For this family, a 16 bit integer Multiplier achieves a frequency of 266MHz, while the floating point unit reaches 235MHz, performing 235 MFLOPS in an FPGA. Additional cells are inserted to synchronize data, what imposes significant area penalties. This and other considerations to apply the technique in real designs are also addressed.
標(biāo)簽： investigates implementing pipelines circuits
上傳時(shí)間： 2015-07-26
上傳用戶：CHINA526
The TAS3204 is a highly-integrated audio system-on-chip (SOC) consisting of a fully-programmable, 48-bit digital audio processor, a 3:1 stereo analog input MUX, four ADCs, four DACs, and other analog functionality. The TAS3204 is programmable with the graphical PurePath Studio? suite of DSP code development software. PurePath Studio is a highly intuitive, drag-and-drop environment that minimizes software development effort while allowing the end user to utilize the power and flexibility of the TAS3204’s digital audio processing core. TAS3204 processing capability includes speaker equalization and crossover, volume/bass/treble control, signal mixing/MUXing/splitting, delay compensation, dynamic range compression, and many other basic audio functions. Audio functions such as matrix decoding, stereo widening, surround sound virtualization and psychoacoustic bass boost are also available with either third-party or TI royalty-free algorithms. The TAS3204 contains a custom-designed, fully-programmable 135-MHz, 48-bit digital audio processor. A 76-bit accumulator ensures that the high precision necessary for quality digital audio is maintained during arithmetic operations. Four differential 102 dB DNR ADCs and four differential 105 dB DNR DACs ensure that high quality audio is maintained through the whole signal chain as well as increasing robustness against noise sources such as TDMA interference. The TAS3204 is composed of eight functional blocks: Clocking System Digital Audio Interface Analog Audio Interface Power supply Clocks, digital PLL I2C control interface 8051 MCUcontroller Audio DSP – digital audio processing 特性 Digital Audio Processor Fully Programmable With the Graphical, Drag-and-Drop PurePath Studio? Software Development Environment 135-MHz Operation 48-Bit Data Path With 76-Bit Accumulator Hardware Single-Cycle Multiplier (28 × 48)
上傳時(shí)間： 2016-05-06
上傳用戶：fagong
ADC模數(shù)轉(zhuǎn)換器件Altium Designer AD原理圖庫(kù)元件庫(kù)SV text has been written to file : 4.4 - ADC模數(shù)轉(zhuǎn)換器件.csvLibrary Component Count : 29Name Description----------------------------------------------------------------------------------------------------ADC0800 National 8-Bit Analog to Digital ConverterADC0809 ADC0831 ADCADC0832 ADC8 Generic 8-Bit A/D ConverterCLC532 High-Speed 2:1 Analog MultiplexerCS5511 National 16-Bit Analog to Digital ConverterDAC8 Generic 8-Bit D/A ConverterEL1501 Differential line Driver/ReceiverEL2082 Current-Mode MultiplierEL4083 Current Mode Four Quadrant MultiplierEL4089 DC Restored Video AmplifierEL4094 Video Gain Control/FaderEL4095 Video Gain Contol/Fader/MultiplexerICL7106 LMC6953_NSC PCI Local Bus Power SupervisorMAX4147 300MHz, Low-Power, High-Output-Current, Differential Line DriverMAX4158 350MHz 2-Channel Video Multiplexer-AmplifierMAX4159 350MHz 2-Channel Video Multiplexer-AmplifierMAX4258 250MHz, 2-Channel Video Multiplexer-AmplifierMAX4259 250MHz 2-Channel Video Multiplexer-AmplifierMAX951 Ultra-Low-Power, Single-Supply Op Amp + Comparator + ReferenceMAX952 Ultra-Low-Power, Single-Supply Op Amp + Comparator + ReferenceMC1496 Balanced Modulator/DemodulatorPLL100k Generic Phase Locked LoopPLL10k Generic Phase Locked LoopPLL5k Generic Phase Locked LoopPLLx Generic Phase Locked Loop水位計(jì)
標(biāo)簽： adc 模數(shù)轉(zhuǎn)換 altium designer
上傳時(shí)間： 2022-03-13
上傳用戶：
基于FPGA設(shè)計(jì)的相關(guān)論文資料大全 84篇用FPGA實(shí)現(xiàn)FFT的研究 劉朝暉 韓月秋 摘 要 目的 針對(duì)高速數(shù)字信號(hào)處理的要求，給出了用現(xiàn)場(chǎng)可編程門陣列(FPGA)實(shí)現(xiàn)的 快速傅里葉變換(FFT)方案.方法 算法為按時(shí)間抽取的基4算法，采用遞歸結(jié)構(gòu)的塊浮點(diǎn)運(yùn) 算方案，蝶算過(guò)程只擴(kuò)展兩個(gè)符號(hào)位以適應(yīng)雷達(dá)信號(hào)處理的特點(diǎn)，乘法器由陣列乘法器實(shí) 現(xiàn).結(jié)果 采用流水方式保證系統(tǒng)的速度，使取數(shù)據(jù)、計(jì)算旋轉(zhuǎn)因子、復(fù)乘、DFT等操作協(xié) 調(diào)一致，在計(jì)算、通信和存儲(chǔ)間取得平衡，避免了瓶頸的出現(xiàn).結(jié)論 實(shí)驗(yàn)表明，用FPGA 實(shí)現(xiàn)高速數(shù)字信號(hào)處理的算法是一個(gè)可行的方案. 關(guān)鍵詞 離散傅里葉變換； 快速傅里葉變換； 塊浮點(diǎn)運(yùn)算； 可編程門陣列 分類號(hào) TP39； TN957.511 Implementation of FFT with FPGA Technology Liu Zhaohui Han Yueqiu (Department of Electronics Engineering, Beijing Institute of Technology, Beijing 100081) Abstract Aim To propose a scheme for implementing FFT with FPGA in accor-dance with the requirement for high speed digital signal processing. Methods The structure of FPGA and requirement of system were considered in the experiment, radix-4 algorithm of DIT and recursive structure were adopted. The group float point arithmetic operation was used in the butterfly and the array Multiplier was used to realize multiplication. Results The pipeline pattern was used to ensure the system speed, it made fetching data, calculating twiddle factor, complex multiplication and D
標(biāo)簽： fpga
上傳時(shí)間： 2022-03-23
上傳用戶：
無(wú)掃描激光雷達(dá)測(cè)距成像技術(shù)和其他測(cè)距系統(tǒng)相比具有可對(duì)動(dòng)態(tài)物體清晰成像，功耗低，體積小，成本低廉的優(yōu)點(diǎn)。無(wú)論在軍事上，還是在民用上都有非常重要的地位，是激光需達(dá)的重點(diǎn)研究方向。本論文介紹了四種基于不同原理的無(wú)掃描激光雷達(dá)方案。其中基于脈沖增益調(diào)制法的無(wú)掃描激光雷達(dá)具有很強(qiáng)的創(chuàng)造性，該方案使用脈沖光源，脈沖光源發(fā)出脈沖光照射目標(biāo)物體，經(jīng)物體反射后由功能光接收器MCP（Micro Channel Plate）接收，對(duì)MCP施加線性增益調(diào)制，在MCP輸出端形成新的光場(chǎng)，由CCD（Charge Couple Device）接收.CCD輸出的圖像經(jīng)圖像處理后得到二維圖像信息。該方案對(duì)背景光干擾不敏感，可成像距離遠(yuǎn)，具有很大的研究?jī)r(jià)值。本文設(shè)計(jì)了一套模擬系統(tǒng)來(lái)驗(yàn)證基于脈沖調(diào)制法的無(wú)掃描激光雷達(dá)測(cè)距方案的可行性，由于光電倍增管PMr（Photoelectric electron-Multiplier tube）在功能上和MCP具有最大的相似性，所以模擬系統(tǒng)中功能光接收器采用光電倍增管。系統(tǒng)由激光驅(qū)動(dòng)模塊、PMT驅(qū)動(dòng)模塊、時(shí)序控制模塊、采樣接收模塊四個(gè)部分組成。我們利用自行研制的模擬系統(tǒng)進(jìn)行了大量的模擬實(shí)驗(yàn)，經(jīng)過(guò)對(duì)實(shí)驗(yàn)結(jié)果分析發(fā)現(xiàn)該模擬系統(tǒng)的測(cè)量距離可達(dá)到1千米，測(cè)量誤差在15米以內(nèi)，表明了該方案是確實(shí)可行的。論文最后對(duì)誤差來(lái)源進(jìn)行了分析，并對(duì)整個(gè)項(xiàng)目進(jìn)行了總結(jié)和展望。
上傳時(shí)間： 2022-06-22
上傳用戶：slq1234567890
VIP專區(qū)-嵌入式/單片機(jī)編程源碼精選合集系列（15）資源包含以下內(nèi)容：1. msc1201 編程2.2. msc1201 編程3.3. msc1201 編程4.4. msc1201 編程5.5. yampp mp3 reference.6. yampp3 mp3 code.7. yampp3 mp3 code.8. yampp3 mp3 test code.9. yampp mp3 source code.10. μC/OS－Ⅱ?qū)崟r(shí)嵌入式操作系統(tǒng)源代碼.11. at45d041a讀寫(xiě)程序模塊.12. bcd 碼轉(zhuǎn)hex碼.13. bcd 轉(zhuǎn)hex.14. 16f877與MCP2510程序.15. 壓力測(cè)量,采集壓力值程序.16. 提供的程序是供四相步進(jìn)電機(jī)使用。本實(shí)驗(yàn)使用的步進(jìn)電機(jī)用直流+12V電壓.17. 模塊采用的就是MCU控制語(yǔ)音芯片和存貯器讀寫(xiě)的方式。為了簡(jiǎn)化實(shí)驗(yàn).18. EEPROM的轉(zhuǎn)換工具。可把C轉(zhuǎn)為BIN文件.19. ppc860平臺(tái)上移植uc OS的實(shí)例.20. avr平臺(tái)上移植uc OS的實(shí)例.21. PROTEL2004破解補(bǔ)丁.22. tms320c5409 fdct source code.23. tms320c5409 demo source code.24. tms320c5409 fft source code.25. tms320c5409 firs source code.26. tms320c5409 demo source code.27. tms320c5409 demo source code.28. tms320c5409 jpeg source code.29. tms320c5409 xrc source code.30. tms320c5409 xscrm source code.31. tms320c5409 dtmf source code.32. tms320c5409 equz source code.33. tms320c5409 dtmf source code.34. xilinx virtex architecture.35. xilinx virtex floorprint.36. Flash Programmer through JTAG for sa.37. 三星x609手機(jī)升級(jí)文件,修改了內(nèi)置鈴聲.38. Interface 93CXX to PIC5X.39. 8x8 Software Multiplier in PIC5X.40. computes the square root of a 16 bit number in pic16c.
標(biāo)簽： 液壓氣動(dòng) 實(shí)用手冊(cè)
上傳時(shí)間： 2013-07-24
上傳用戶：eeworm
VIP專區(qū)-嵌入式/單片機(jī)編程源碼精選合集系列（63）資源包含以下內(nèi)容：1. zlg7289a驅(qū)動(dòng)程序 包括頭文件和主文件 匯編和C語(yǔ)言齊全.2. vc++ 開(kāi)放的串口通訊程序.3. 電子萬(wàn)年歷制作的全部資料,可用單面板制作,頂層線比較少可用跳線,內(nèi)用源碼+原理圖+PCB,可以顯示到2050年的陰陽(yáng)歷,只須調(diào)整陽(yáng)歷..4. i2c協(xié)議實(shí)現(xiàn).5. 優(yōu)龍ＰＡＸ２５５開(kāi)發(fā)板所帶ＡＣ９７聲卡的測(cè)試程序源碼.6. 周立功的USB大容量存儲(chǔ)開(kāi)發(fā)板帶CPLD的代碼D的源碼.7. wangxiaoyong0015@yahoo.com.cn b不懂的給我發(fā)郵件！！！ 謝謝啊！！一定支持我.8. 用VHDL實(shí)現(xiàn)的DDS.9. uclinux移植過(guò)程中.10. viterbi decoder , use verilog HDL language..11. 三星ARM試驗(yàn)箱.12. USB JTAG 卡. 允許從主機(jī)USB口直接控制JTAG I/O 信號(hào)。 USB端與Altera USB-Blaster使用相同的協(xié)議。主機(jī)端與openwince, OpenOCD和Altera的.13. 許多非常有用的 Verilog 實(shí)例: ADC, FIFO, ADDER, Multiplier 等.14. LPC2214開(kāi)發(fā)原理圖,絕好!!!!!!!!!! LPC2214開(kāi)發(fā)原理圖,絕好.15. CPLD開(kāi)發(fā)電纜原理圖,絕好的東東!!! CPLD開(kāi)發(fā)電纜原理圖,絕好的.16. 語(yǔ)音評(píng)分算法的實(shí)現(xiàn),主要可以實(shí)現(xiàn)對(duì)一段語(yǔ)音信號(hào)進(jìn)行判別并進(jìn)行打分功能..17. lpc2132開(kāi)發(fā)板的原理圖,適合初學(xué)者學(xué)習(xí)用.18. 用ICC寫(xiě)的ATMega8的4X4鍵盤驅(qū)動(dòng)程序.19. FPGA-CPLD_DesignTool,事例程序陸續(xù)上傳請(qǐng)需要的朋友下載.20. I2C編譯通過(guò)...大家下去直接用.支持程序員聯(lián)合開(kāi)發(fā)網(wǎng).21. 步進(jìn)電機(jī)控制實(shí)驗(yàn).22. MagicARM2410與PC機(jī)串口通信實(shí)驗(yàn).23. CanBus通信實(shí)驗(yàn).24. 這是個(gè)C的一個(gè)程序.25. 這是個(gè)嵌入式程序.26. 一個(gè)MSComm控件的收發(fā)程序.27. 包括TI全系列DSK原理圖匯總.28. 周立功公司的USB2.0芯片ISP1581的鍵盤上位機(jī)VC編的源程序.29. 這是一個(gè)學(xué)習(xí)proteus很好的資料。希望對(duì)大家的學(xué)習(xí)很有幫助.30. 本代碼內(nèi)容是關(guān)于帶遙控器控制的LCD顯示的實(shí)時(shí)時(shí)鐘。.31. 本代碼是關(guān)于用INT0中斷實(shí)現(xiàn)按鍵計(jì)數(shù).32. 本代碼是關(guān)于循環(huán)燈的代碼.33. 本代碼是關(guān)于符點(diǎn)數(shù)在數(shù)碼管上顯示的.34. 本代碼是關(guān)于AT24C02串行存儲(chǔ)器的讀寫(xiě)的.35. 一種使用可控硅控制.36. 這是運(yùn)動(dòng)控制課程設(shè)計(jì)時(shí)自己設(shè)計(jì)的電路原理圖.37. vxworks tffs mtd 層源碼,支持非INTEL格式.38. 自己看吧 eerom的.39. DOS下的TCP/IP源代碼,可以做參考..40. 基于FPGA的SD控制器實(shí)現(xiàn).目前實(shí)現(xiàn)讀操作功能,可作參考..
標(biāo)簽： 五金手冊(cè)
上傳時(shí)間： 2013-06-01
上傳用戶：eeworm
VIP專區(qū)-嵌入式/單片機(jī)編程源碼精選合集系列（158）資源包含以下內(nèi)容：1. PCB設(shè)計(jì)與技巧.2. 測(cè)溫控制系統(tǒng)(C程序).3. 單片機(jī)開(kāi)發(fā).4. 本書(shū)為L(zhǎng)inux編程工具書(shū).5. PIC16F877_DS1302時(shí)鐘程序.6. 圖形接口ucGUI的內(nèi)核的詳細(xì)說(shuō)明手冊(cè)中文版.7. aduc845 N30部分 手冊(cè).8. 這是與ge 90-30通訊的教學(xué).9. c++視頻教程.10. 軟件代碼閱讀方法與實(shí)踐 英文原版.11. 請(qǐng)?jiān)诒灸夸洿娣臮COS 2.52源代碼.12. 24c04詳細(xì)使用說(shuō)明.13. The widespread use of embedded systems mandates the development of industrial software design method.14. 個(gè)人用CADENCE的經(jīng)驗(yàn)總結(jié),希望對(duì)大家有所裨益.15. 游戲機(jī)電路圖 開(kāi)發(fā).16. 模糊控制,單片機(jī)實(shí)現(xiàn),是超星格式文件,包括模糊理論和單片機(jī)程序.17. e2prom通過(guò)i2c總線的讀寫(xiě) 注釋少了點(diǎn) 自己編的.18. SPI Master Core Specification.19. Protel_dxp2004的簡(jiǎn)要使用說(shuō)明.20. ARM嵌入式入門級(jí)教程。學(xué)習(xí)ARM的參考資料！.21. tcp,udp程序.22. matlab的應(yīng)用.23. 從西門PLC讀取數(shù)據(jù).24. 華東師大碩士論文嵌入式圖形用戶界面系統(tǒng)的研究與開(kāi)發(fā).25. ARM7 LPC2114自已工作中編寫(xiě)的直流馬達(dá)驅(qū)動(dòng)源程序。 文件： uart_motor.HEX Uart_motor.mcp LPC2294.h 等相關(guān)文件。.26. 54x54-bit Radix-4 Multiplier based on Modified Booth Algorithm.27. 單片機(jī)之間的通訊（多個(gè)） 可以設(shè)定選擇接收端 KEIL C 開(kāi)發(fā)平臺(tái) PROTEUS 測(cè)試過(guò) 附有proteus 原理圖.28. keil c51實(shí)用技巧.29. 西門子300的一個(gè)程序.30. Terawins的芯片T112的源程序.31. 博創(chuàng)ARM3000原理圖.32. 硬件PCB圖.33. 硬件PCB圖2.34. 完整的wav文件播放程序采用lpc2148芯片.35. EP9315的PCB原理圖.36. 漢字在計(jì)算機(jī)內(nèi)存放分為兩種情況.37. 手持機(jī)嵌入式開(kāi)發(fā),本代碼是基于c-c++..38. S3C2440核心板原理圖.39. 詳細(xì)描述了如何用CPLD來(lái)做IDE的PIO時(shí)序.40. 這是一個(gè)實(shí)用于Winrunner的記事本程序自動(dòng)測(cè)試腳本和GUI文件.
標(biāo)簽： 無(wú)線電遙控
上傳時(shí)間： 2013-07-21
上傳用戶：eeworm
蟲(chóng)蟲(chóng)下載站版權(quán)所有 京ICP備2021023401號(hào)-1
<input id="8c2mw"></input>