Power conversion by virtue of its basic role produces harmonics due to theslicing of either voltages or currents. To a large extent the pollution in theutility supply and the deterioration of the power quality has been generatedor created by non-linear converters. It is therefore ironic that power convertersshould now be used to clean up the pollution that they helped to create inthe first place.In a utility system, it is desirable to prevent harmonic currents (which resultin EMI and resonance problems) and limit reactive power flows (whichresult in transmission losses).Traditionally, shunt passive filters, comprised of tuned LC elements andcapacitor banks, were used to filter the harmonics and to compensate forreactive current due to non-linear loads. However, in practical applicationsthese methods have many disadvantages.
The LTC®4099 high effi ciency USB power manager andLi-Ion/Polymer battery charger seamlessly managespower distribution from multiple sources in portableapplications. It is differentiated from other USB powermanagers by its bidirectional I2C port that allows the hostmicroprocessor to control and monitor all aspects of theUSB power management and battery charging processes.In addition, a programmable interrupt generation functionalerts the host microprocessor to changes in device statusand provides unprecedented control of power managementfunctions. This high degree of confi gurability allowspost-layout changes in operation, even changes in thefi eld, and it allows a single qualifi ed device to be usedin a variety of products, thus reducing design time andeasing inventory management.
Occasionally, we are tasked with designing circuitry for aspecific purpose. The request may have customer originsor it may be an in-house requirement. Alternately, a circuitmay be developed because its possibility is simply tooattractive to ignore1. Over time, these circuits accumulate,encompassing a wide and useful body of proven capabilities.They also represent substantial effort. These considerationsmake publication an almost obligatory propositionand, as such, a group of circuits is presented here. This isnot the first time we have displayed such wares and, giventhe encouraging reader response, it will not be the last2.Eighteen circuits are included in this latest effort, roughlyarranged in the categories given in this publication’s title.They appear at the next paragraph.
The ISO7220 and ISO7221 are dual-channel digital isolators. To facilitate PCB layout, the channels are orientedin the same direction in the ISO7220 and in opposite directions in the ISO7221. These devices have a logic inputand output buffer separated by TI’s silicon-dioxide (SiO2) isolation barrier, providing galvanic isolation of up to4000 V. Used in conjunction with isolated power supplies, these devices block high voltage, isolate grounds, andprevent noise currents on a data bus or other circuits from entering the local ground and interfering with ordamaging sensitive circuitry.
The C500 microcontroller family usually provides only one on-chip synchronous serialchannel (SSC). If a second SSC is required, an emulation of the missing interface mayhelp to avoid an external hardware solution with additional electronic components.The solution presented in this paper and in the attached source files emulates the mostimportant SSC functions by using optimized SW routines with a performance up to 25KBaud in Slave Mode with half duplex transmission and an overhead less than 60% atSAB C513 with 12 MHz. Due to the implementation in C this performance is not the limitof the chip. A pure implementation in assembler will result in a strong reduction of theCPU load and therefore increase the maximum speed of the interface. In addition,microcontrollers like the SAB C505 will speed up the interface by a factor of two becauseof an optimized architecture compared with the SAB C513.Moreover, this solution lays stress on using as few on-chip hardware resources aspossible. A more excessive consumption of those resources will result in a highermaximum speed of the emulated interface.Due to the restricted performance of an 8 bit microcontroller a pin compatible solution isprovided only; the internal register based programming interface is replaced by a set ofsubroutine calls.The attached source files also contain a test shell, which demonstrates how to exchangeinformation between an on-chip HW-SSC and the emulated SW-SSC via 5 external wiresin different operation modes. It is based on the SAB C513 (Siemens 8 bit microcontroller).A table with load measurements is presented to give an indication for the fraction of CPUperformance required by software for emulating the SSC.
The solution presented in this paper and in the attached source files emulates the mostimportant SSC functions by using SW routines implemented in C. The code is focused onthe SAB C513, but will fit to all C500 derivatives.Beyond the low level software drivers a test shell is delivered. This shell allows a quicktest of the software drivers by an emulator or a starter kit demo board.
基于P87 C591的CAN總線系統(tǒng)智能節(jié)點(diǎn)設(shè)計(jì)Design of CAN System Intelligent Node Based on P87C591
給出了基于帶CAN控制器的單片8位微控制器P87C591的智能節(jié)點(diǎn)的硬件電路及軟件結(jié)構(gòu)，詳細(xì)介紹了設(shè)計(jì)中的難點(diǎn)及實(shí)現(xiàn)過(guò)程中應(yīng)注意的問(wèn)題。關(guān)鍵詞:CAN總線;智能節(jié)點(diǎn)
Abstract:A h ardc ircuita nds oftw arec onfigurationo fth ei ntelligentnode based on a microcontroller with CAN controller P87C591 arepresented.E speciallyt hec ruxi nd esigninga ndt hep roblemst hatshould be paid attention in realizing are discussed in details.Keyw ords:C AN;in telligentn ode
CA N 總線 是德國(guó)Bosch從20世紀(jì)80年代初為解決現(xiàn)代汽車(chē)中眾多的控制與測(cè)試儀器之間的數(shù)據(jù)交換而開(kāi)發(fā)的一種串行數(shù)據(jù)通信協(xié)議，它是一種多主總線，通信介質(zhì)可以是雙絞線、同軸電纜或光導(dǎo)纖維。由于CAN總線具有較強(qiáng)的糾錯(cuò)能力，支持差分收發(fā)，因而適合高噪聲環(huán)境。并具有較遠(yuǎn)的傳輸距離，適用于許多領(lǐng)域的分布式測(cè)控系統(tǒng)。目前已在工業(yè)自動(dòng)化、建筑物環(huán)境控制、醫(yī)療設(shè)備等許多領(lǐng)域得到廣泛的應(yīng)用。CAN已成為國(guó)際標(biāo)準(zhǔn)化組織IS011898標(biāo)準(zhǔn)。
針對(duì)使用硬件描述語(yǔ)言進(jìn)行設(shè)計(jì)存在的問(wèn)題，提出一種基于FPGA并采用DSP Builder作為設(shè)計(jì)工具的數(shù)字信號(hào)處理器設(shè)計(jì)方法。并按照Matlab/Simulink/DSP Builder/QuartusⅡ設(shè)計(jì)流程，設(shè)計(jì)了一個(gè)12階FIR 低通數(shù)字濾波器，通過(guò)Quartus 時(shí)序仿真及嵌入式邏輯分析儀SignalTapⅡ硬件測(cè)試對(duì)設(shè)計(jì)進(jìn)行了驗(yàn)證。結(jié)果表明，所設(shè)計(jì)的FIR 濾波器功能正確，性能良好。
Abstract:
Aiming at the problems in designing DSP using HDL，a method of designing DSP based on FPGA which using DSP Builder as designed tool is pointed out.A 12-order low-pass FIR digital filter was designed according to the process of Matlab/Simulink/DSP Builder/QuartusⅡ, and the design was verified by the timing simulation based on QuartusⅡand practical test based on SignalTapⅡ. The result shows the designed filter is correct in function and good in performance.
Accurate measurement of the third order intercept pointfor low distortion IC products such as the LT5514 requirescertain precautions to be observed in the test setup andtesting procedure. The LT5514 linearity performance ishigh enough to push the test equipment and test set-up totheir limits. A method for accurate measurement of thirdorder intermodulation products, IM3, with standard testequipment is outlined below.It is also important to correctly interpret the LT5514specification with respect to ROUT, and the impact ofdemo-board transmission-line termination loss whenevaluating the linearity performance, as explained in theLT5514 Datasheet and in Note 1 of this document.
關(guān)于NETFLOW信息分析的軟件。 is a netflow analyzer. It uses MySQL database to store accounting information. Filters, used in the JFlowAnalyzer, allows very flexible classificate any kind of traffic and store it in the differend fields in database
