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VHDL-AMS

VHDL-AMS是VHDL的一個(gè)分支，它支持模擬、數(shù)字、數(shù)?；旌想娐废到y(tǒng)的建模與仿真。

VHDL硬件語言編寫的曼徹斯特碼的解碼程序

此曼徹斯特碼的解碼程序是采用VHDL硬件語言編寫的。

標(biāo)簽： VHDL 硬件曼徹斯特語言

上傳時(shí)間： 2013-09-06

上傳用戶：zhouli
用vhdl編寫的基于fpga的數(shù)字頻率計(jì)程序算法

用vhdl編寫的基于fpga的數(shù)字頻率計(jì)程序算法

標(biāo)簽： vhdl fpga 編寫數(shù)字頻率計(jì)

上傳時(shí)間： 2013-09-07

上傳用戶：chfanjiang
US Navy VHDL Modelling Guide

This document was developed under the Standard Hardware and Reliability Program (SHARP) TechnologyIndependent Representation of Electronic Products (TIREP) project. It is intended for use by VHSIC HardwareDescription Language (VHDL) design engineers and is offered as guidance for the development of VHDL modelswhich are compliant with the VHDL Data Item Description (DID DI-EGDS-80811) and which can be providedto manufacturing engineering personnel for the development of production data and the subsequent productionof hardware. Most VHDL modeling performed to date has been concentrated at either the component level orat the conceptual system level. The assembly and sub-assembly levels have been largely disregarded. Under theSHARP TIREP project, an attempt has been made to help close this gap. The TIREP models are based upon lowcomplexity Standard Electronic Modules (SEM) of the format A configuration. Although these modules are quitesimple, it is felt that the lessons learned offer guidance which can readily be applied to a wide range of assemblytypes and complexities.

標(biāo)簽： Modelling Guide Navy VHDL

上傳時(shí)間： 2014-12-23

上傳用戶：xinhaoshan2016
PLD Programming Using VHDL

本文詳細(xì)討論了VHDL語句對(duì)PLD設(shè)計(jì)的影響和設(shè)計(jì)經(jīng)驗(yàn)，經(jīng)典文章，值得仔細(xì)閱讀消化。,PLD Programming Using VHDL

標(biāo)簽： Programming Using VHDL PLD

上傳時(shí)間： 2013-11-17

上傳用戶：teddysha
VHDL,Verilog,System verilog比較

本文簡(jiǎn)單討論并總結(jié)了VHDL、Verilog，System verilog 這三中語言的各自特點(diǎn)和區(qū)別As the number of enhancements to variousHardware Description Languages (HDLs) hasincreased over the past year, so too has the complexityof determining which language is best fora particular design. Many designers and organizationsare contemplating whether they shouldswitch from one HDL to another.

標(biāo)簽： Verilog verilog System VHDL

上傳時(shí)間： 2013-10-16

上傳用戶：牛布牛
多功能數(shù)字鐘的VHDL設(shè)計(jì)

多功能數(shù)字鐘的VHDL設(shè)計(jì)

標(biāo)簽： VHDL 多功能數(shù)字

上傳時(shí)間： 2013-10-29

上傳用戶：swz13842860183
基于VHDL的微型打印機(jī)控制器設(shè)計(jì)

介紹基于VHDL的微型打印機(jī)控制器的設(shè)計(jì)。論述了微型打印機(jī)的基本原理，以及實(shí)現(xiàn)控制器的VHDL語言設(shè)計(jì)。打印機(jī)的數(shù)據(jù)來自系統(tǒng)中的存儲(chǔ)模塊，根據(jù)需要控制打印。該微型打印機(jī)控制器可取代傳統(tǒng)的微型打印機(jī),且抗干擾性好,可靠性高，具有較強(qiáng)的移植性，稍加改動(dòng)就可應(yīng)用于不同場(chǎng)合。 Abstract: This paper introduced the design method of micro printer controller based on VHDL.The basic principles of microprinter is explained,as well as the realization of the controller by VHDL language.The printer data is from the system memory modules,can control printer.The design of microprinter controller has antigood and high reliability，it can replace the traditional printer.The controller has very good portability,and need little modify that can use in different situation.

標(biāo)簽： VHDL 微型打印機(jī) 制器設(shè)計(jì)

上傳時(shí)間： 2013-11-03

上傳用戶：dudu1210004
用VHDL語言進(jìn)行MCS－51兼容單片機(jī)ip核開發(fā)

用VHDL語言進(jìn)行MCS－51兼容單片機(jī)ip核開發(fā)

標(biāo)簽： VHDL MCS 51兼容語言

上傳時(shí)間： 2013-10-28

上傳用戶：nem567397
VHDL教程講義

VHDL

標(biāo)簽： VHDL 教程講義

上傳時(shí)間： 2014-01-13

上傳用戶：jixingjie
FPGA與ARM EPI通信，控制16路步進(jìn)電機(jī)和12路DC馬達(dá) VHDL編寫的

FPGA與ARM EPI通信，控制16路步進(jìn)電機(jī)和12路DC馬達(dá) VHDL編寫的，，，，，

標(biāo)簽： FPGA VHDL ARM EPI

上傳時(shí)間： 2013-10-21

上傳用戶：zhyfjj