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Voltage-output

  • DAC技術用語 (D/A Converters Defini

    Differential Nonlinearity: Ideally, any two adjacent digitalcodes correspond to output analog voltages that are exactlyone LSB apart. Differential non-linearity is a measure of theworst case deviation from the ideal 1 LSB step. For example,a DAC with a 1.5 LSB output change for a 1 LSB digital codechange exhibits 1⁄2 LSB differential non-linearity. Differentialnon-linearity may be expressed in fractional bits or as a percentageof full scale. A differential non-linearity greater than1 LSB will lead to a non-monotonic transfer function in aDAC.Gain Error (Full Scale Error): The difference between theoutput voltage (or current) with full scale input code and theideal voltage (or current) that should exist with a full scale inputcode.Gain Temperature Coefficient (Full Scale TemperatureCoefficient): Change in gain error divided by change in temperature.Usually expressed in parts per million per degreeCelsius (ppm/°C).Integral Nonlinearity (Linearity Error): Worst case deviationfrom the line between the endpoints (zero and full scale).Can be expressed as a percentage of full scale or in fractionof an LSB.LSB (Lease-Significant Bit): In a binary coded system thisis the bit that carries the smallest value or weight. Its value isthe full scale voltage (or current) divided by 2n, where n is theresolution of the converter.Monotonicity: A monotonic function has a slope whose signdoes not change. A monotonic DAC has an output thatchanges in the same direction (or remains constant) for eachincrease in the input code. the converse is true for decreasing codes.

    標簽: Converters Defini DAC

    上傳時間: 2013-10-30

    上傳用戶:stvnash

  • ADC轉換器技術用語 (A/D Converter Defi

    ANALOG INPUT BANDWIDTH is a measure of the frequencyat which the reconstructed output fundamental drops3 dB below its low frequency value for a full scale input. Thetest is performed with fIN equal to 100 kHz plus integer multiplesof fCLK. The input frequency at which the output is −3dB relative to the low frequency input signal is the full powerbandwidth.APERTURE JITTER is the variation in aperture delay fromsample to sample. Aperture jitter shows up as input noise.APERTURE DELAY See Sampling Delay.BOTTOM OFFSET is the difference between the input voltagethat just causes the output code to transition to the firstcode and the negative reference voltage. Bottom Offset isdefined as EOB = VZT–VRB, where VZT is the first code transitioninput voltage and VRB is the lower reference voltage.Note that this is different from the normal Zero Scale Error.CONVERSION LATENCY See PIPELINE DELAY.CONVERSION TIME is the time required for a completemeasurement by an analog-to-digital converter. Since theConversion Time does not include acquisition time, multiplexerset up time, or other elements of a complete conversioncycle, the conversion time may be less than theThroughput Time.DC COMMON-MODE ERROR is a specification which appliesto ADCs with differential inputs. It is the change in theoutput code that occurs when the analog voltages on the twoinputs are changed by an equal amount. It is usually expressed in LSBs.

    標簽: Converter Defi ADC 轉換器

    上傳時間: 2013-11-12

    上傳用戶:pans0ul

  • 相敏檢波電路鑒相特性的仿真研究

    分析了調幅信號和載波信號之間的相位差與調制信號的極性的對應關系,得出了相敏檢波電路輸出電壓的極性與調制信號的極性有對應關系的結論。為了驗證相敏檢波電路的這一特性,給出3 個電路方案,分別選用理想元件和實際元件,采用Multisim 對其進行仿真實驗,直觀形象地演示了相敏檢波電路的鑒相特性,是傳統的實際操作實驗所不可比擬的。關鍵詞:相敏檢波;鑒相特性;Multisim;電路仿真 Abstract : The corresponding relation between modulation signal polarity and difference phases of amplitudemodulated signal and the carrier signal ,the polarity of phase2sensitive detecting circuit output voltage and the polarity of modulation signal are correspondent . In order to verify this characteristic ,three elect ric circuit s plans are produced ,idea element s and actual element s are selected respectively. Using Multisim to carry on a simulation experiment ,and then demonst rating the phase detecting characteristic of the phase sensitive circuit vividly and directly. Which is t raditional practical experience cannot be com pared.Keywords :phase sensitive detection ;phase2detecting characteristic ;Multisim;circuit simulation

    標簽: 相敏檢波 電路 仿真研究 鑒相

    上傳時間: 2013-11-23

    上傳用戶:guanhuihong

  • 光電轉換電路設計

    OPTOELECTRONICS CIRCUIT COLLECTION AVALANCHE PHOTODIODE BIAS SUPPLY 1Provides an output voltage of 0V to +80V for reverse biasingan avalanche photodiode to control its gain. This circuit canalso be reconfigured to supply a 0V to –80V output.LINEAR TEC DRIVER–1This is a bridge-tied load (BTL) linear amplifier for drivinga thermoelectric cooler (TEC). It operates on a single +5Vsupply and can drive ±2A into a common TEC.LINEAR TEC DRIVER–2This is very similar to DRIVER–1 but its power output stagewas modified to operate from a single +3.3V supply in orderto increase its efficiency. Driving this amplifier from astandard +2.5V referenced signal causes the output transistorsto have unequal power dissipation.LINEAR TEC DRIVER–3This BTL TEC driver power output stage achieves very highefficiency by swinging very close to its supply rails, ±2.5V.This driver can also drive ±2A into a common TEC. Operationis shown with the power output stage operating on±1.5V supplies. Under these conditions, this linear amplifiercan achieve very high efficiency. Application ReportThe following collection of analog circuits may be useful in electro-optics applications such as optical networkingsystems. This page summarizes their salient characteristics.

    標簽: 光電轉換 電路設計

    上傳時間: 2013-10-27

    上傳用戶:落花無痕

  • Lakewood (MAXREFDES7#)3.3V Input, ±12V (±15V) Output Isolated Power Supply

    Abstract: This document details the Lakewood (MAXREFDES7#) subsystem reference design, a 3.3V input, ±12V (±15V) output, isolated power supply. The Lakewood reference design includes a 3W primary-side transformer H-bridge driver for isolated supplies, and two wide input range and adjustable output low-dropout linear regulators (LDOs). Test results and hardware files are included.

    標簽: MAXREFDES Lakewood Isolated Output

    上傳時間: 2013-11-02

    上傳用戶:fengzimili

  • Riverside (MAXREFDES8#)3.3V Input, 12V (15V) Output Isolated Power Supply

    Abstract: This document details the Riverside (MAXREFDES8#) subsystem reference design, a 3.3V input, 12V (15V) output, isolated power supply. The Riverside reference design includes a 3W primary-side transformer H-bridge driver for isolated supplies, and one wide input range and adjustable output low-dropout linear regulator (LDO). Test results and hardware files are included.

    標簽: Riverside MAXREFDES Isolated Output

    上傳時間: 2013-11-16

    上傳用戶:會稽劍客

  • 交流瓦特/瓦特小時,乏爾/乏爾小時轉換器

    交流瓦特/瓦特小時,乏爾/乏爾小時轉換器 特點: 精確度0.25%滿刻度 多種輸入,輸出選擇 輸入與輸出絕緣耐壓2仟伏特/1分鐘 沖擊電壓測試5仟伏特(1.2x50us) 突波電壓測試2.5仟伏特(0.25ms/1MHz) (IEC255-4) 尺寸小,穩定性高 主要規格: 精確度: 0.25% F.S. (23 ±5℃) 輸入負載: <0.2VA (Voltage) <0.2VA (Current) 最大過載能力: Current related input:3 x rated continuous 10 x rated 30 sec. ,25 x rated 3sec. 50 x rated 1sec. Voltage related input:maximum 2 x rated continuous 輸出反應速度: < 250ms(0~90%) 輸出負載能力: < 10mA for voltage mode < 10V for current mode 輸出之漣波 : < 0.1% F.S. 脈波輸出型態: Photocouple of open collector (max.30V/40mA) 歸零調整范圍: 0~±5% F.S. 最大值調整范圍: 0~±10% F.S. 溫度系數: 100ppm/℃ (0~50℃) 隔離特性: Input/Output/Power/Case 絕緣阻抗: >100Mohm with 500V DC 絕緣耐壓能力: 2KVac/1 min. (input/output/power/case) 突波測試: ANSI C37.90a/1974,DIN-IEC 255-4 impulse voltage 5KV(1.2x50us) 使用環境條件: -20~60℃(20 to 90% RH non-condensed) 存放環境條件: -30~70℃(20 to 90% RH non-condensed) CE認證: EN 55022:1998/A1:2000 Class A EN 61000-3-2:2000 EN 61000-3-3:1995/A1:2001 EN 55024:1998/A1:2001

    標簽: 瓦特 交流 轉換器

    上傳時間: 2013-11-11

    上傳用戶:wettetw

  • 電源供應器與數字電位器校準應用筆記

    Abstract: A resistive feedback network is often used to set the output voltage of a power supply. A mechanical potentiometer (pot)conveniently solves the problem of adjusting a power supply. For easier automatic calibration, a mechanical pot can be replaced witha digital pot. This application note presents a calibration solution that uses a digital pot, because digipots are smaller, do not movewith age or vibration, and can be recalibrated remotely. This proposed solution reduces the susceptibility of the system to thetolerance of the digital pot's end-to-end resistance, making the solution optimal fordesigners. This application note also explainssome of the equations required to calculate the resistor chain values and to use a digital pot in this way. A spreadsheet withstandard reisistor values is available for easy calculations.

    標簽: 電源供應器 數字電位器 應用筆記 校準

    上傳時間: 2013-10-31

    上傳用戶:caiguoqing

  • 電感開關穩壓器提高輸入電壓

    Abstract: Uses the MAX641 switching controller and an external discrete charge pump to step up the input voltage. This circuitcan service low loads and is efficient when the output is two, three, four times the input voltage. Adding the MAX627 MOSdriver can further increase the output current capability.

    標簽: 電感 開關穩壓器 輸入電壓

    上傳時間: 2013-11-15

    上傳用戶:zwei41

  • 四路輸出開關轉換器提供TFT LCD面板的電源

      The LT®1943 is a highly integrated, 4-output regulatordesigned to power large TFT LCD panels. The LT1943employs switching regulators—instead of linear regulators—to minimize power dissipation and accommodate awide input voltage range. The wide input range, 4.5V to22V, allows it to accept a variety of power sources,including the commonly used 5V, 12V and 19V AC adaptors.

    標簽: TFT LCD 四路輸出 開關轉換器

    上傳時間: 2013-10-19

    上傳用戶:yuhaihua_tony

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