This demo nstrates the use of the reversible jump MCMC simulated annealing for neural networks. This algorithm enables us to maximise the joint posterior distribution of the network parameters and the number of basis function. It performs a global search in the joint space of the parameters and number of parameters, thereby surmounting the problem of local minima. It allows the user to choose among various model selection criteria, including AIC, BIC and MDL
標簽： This reversible annealing the
上傳時間： 2015-07-19
上傳用戶：ma1301115706
JavaTV Program source code Need to play Windows Media files and streams, mpeg4 video or DVDs in java? Access WDM capture devices? Control a firewire DVCam? Then maybe this can help you. dsj is an ongoing project to provide a java wrapper around Microsoft s DirectShow API. It offers a set of high level classes that give java easy access to functionality widely missed by java programmers and also lets you dive deeper into the interiors of Windows core api for 2D media. On the java side dsj tries to keep things open as possible - you may use it standalone or let it feed data into JMF or other APIs.
標簽： Program Windows streams JavaTV
上傳時間： 2013-12-17
上傳用戶：TF2015
關于FPGA流水線設計的論文 This work investigates the use of very deep pipelines for implementing circuits in FPGAs, where each pipeline stage is limited to a single FPGA logic element (LE). The architecture and VHDL design of a parameterized integer array multiplier is presented and also an IEEE 754 compliant 32-bit floating-point multiplier. We show how to write VHDL cells that implement such approach, and how the array multiplier architecture was adapted. Synthesis and simulation were performed for Altera Apex20KE devices, although the VHDL code should be portable to other devices. For this family, a 16 bit integer multiplier achieves a frequency of 266MHz, while the floating point unit reaches 235MHz, performing 235 MFLOPS in an FPGA. Additional cells are inserted to synchronize data, what imposes significant area penalties. This and other considerations to apply the technique in real designs are also addressed.
標簽： investigates implementing pipelines circuits
上傳時間： 2015-07-26
上傳用戶：CHINA526
OLE Programmer s Reference Information in this online help system is subject to change without notice and does not represent a commitment on the part of Microsoft Corporation. The software and/or files described in this online help system are furnished under a license agreement or nondisclosure agreement. The software and/or files may be used or copied only in accordance with the terms of the agreement. The purchaser may make one copy of the software for backup purposes. No part of this online help system may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying, recording, or information and retrieval systems, for any purpose other than the purchaser s personal use, without the written permission of Microsoft Corporation.
標簽： Information Programmer Reference subject
上傳時間： 2015-08-04
上傳用戶：hxy200501
A six people s rushing replies an implement, use some s switches in toggle switch K0 ~ K5 is that ON accomplishes when rushing to reply button , nobody rush to answer, 6 numerical code circulation takes turns at demonstrating 1 ~ 6 (horse races) , who rushes to reply the numerical code stops having a ride on a horse , first, whose serial number, has simultaneous light of 6 numerical codes again afterwards the key presses down. System denies responding to, until this place is OFF batch , the wheel restoring 1 ~ 6 horse races starting time as soon as rushes to answer.
標簽： implement switches rushing replies
上傳時間： 2013-12-27
上傳用戶：l254587896
RTL-lwIP is the porting of the lwIP TCP/IP stack to RTLinux-GPL.The focus of the RTL-lwIP stack is to reduce memory usage and code size, making RTL-lwIP suitable for use in small clients with very limited resources such as embedded systems.
標簽： RTL-lwIP the stack RTLinux-GPL
上傳時間： 2015-09-05
上傳用戶：
THIS CODE IS FOR EXAMPLE PURPOSES ONLY, USE AT YOUR OWN RISK, NO WARRANTY IS ASSUMED OR IMPLIED The intension of this code is to provide an example of attaching to the MUX layer with a custom ethernet protocol. Though the NPT code is provided for handling alternate frames, it has not been tested.
標簽： PURPOSES WARRANTY ASSUMED EXAMPLE
上傳時間： 2015-09-21
上傳用戶：qq521
This lab exercise will cover the use of AccelDSP’s design exploration capabilities that include mapping variables to memory and unrolling loop and vector operations. You will learn how to create different hardware architectures without modifying the MATLAB source to explore different area/performance tradeoffs.
標簽： capabilities exploration AccelDSP exercise
上傳時間： 2014-12-22
上傳用戶：eclipse
The intended use of this help manual is a quick reference guide as it is not fully inclusive of all elements of the PL/SQL Programming Language. Please refer to the PL/SQL User s Guide and Reference for more information.
標簽： inclusive reference intended manual
上傳時間： 2014-01-26
上傳用戶：lnnn30
his paper provides a tutorial and survey of methods for parameterizing surfaces with a view to applications in geometric modelling and computer graphics. We gather various concepts from di® erential geometry which are relevant to surface mapping and use them to understand the strengths and weaknesses of the many methods for parameterizing piecewise linear surfaces and their relationship to one another.
標簽： parameterizing provides tutorial surfaces
上傳時間： 2014-11-09
上傳用戶：努力努力再努力
