EWB軟件是交互圖像技術有限公司(INTERACTIVE IMAGE technologies Ltd)在九十年代初推出的EDA軟件
上傳時間： 2013-05-26
上傳用戶：heart_2007
Abstract: A digital RF modulator, an integrated solution that satisfies stringent DOCSIS RF-performancerequirements, takes advantage of modern technologies like high-performance wideband digital-to-analogconversion and CMOS technology scaling. This application note describes the concept and advantages ofa digital quadrature amplitude modulation (QAM) modulator that uses the direct-RF architecture to enablea cable access platform (CCAP) system.
上傳時間： 2013-10-20
上傳用戶：drink！
Abstract: What can be simpler than designing with CMOS and BiCMOS? These technologies are very easy to use butthey still require careful design. This tutorial discusses the odd case of circuits that seem to work but exhibit somepeculiar behaviors—including burning the designer's fingers!
上傳時間： 2013-11-03
上傳用戶：dick_sh
由lnfineon technologies (IT)公司推出的COOLMOS ICE2A165／2,65／365系列芯片是PWM+MOSFET二合一芯片，其優點是：用它做開關電源，無需加散熱器，在通用電網即可輸出20～50W 的功率；保護功能齊全；電路結構簡單；能自動降低空載時的工作頻率，從而降低待機狀態的損耗，故在中小功率開關電源中有著廣泛的應用前景。
上傳時間： 2013-11-09
上傳用戶：chenjjer
This application note is an overview discussion of theLinear Technology SPICE macromodel library. It assumeslittle if any prior knowledge of this software library or itshistory. However, it does assume familiarity with both theanalog simulation program SPICE (or one of its manyderivatives), and modern day op amps, including bipolar,JFET, and MOSFET amplifier technologies
上傳時間： 2013-11-14
上傳用戶：zhanditian
COOLMOS ICE2A165/265/365是Infineon technologies 公司推出的系列PWM+MOSFET二合一芯片，其突出特點是由其組成的開關電源，在市電電網中工作時，無需外加散熱器即可輸出20～50W的輸出功率;且能自動降低空載時的工作頻率，從而降低待機狀態的損耗;同時還具有過、欠壓保護、過熱保護、過流保護以及自恢復功能，因而在中小功率開關電源中有著廣泛 的應用前景
上傳時間： 2013-10-17
上傳用戶：HGH77P99
以C8051F020為核心處理器，設計無線傳感器網絡數據采集系統。系統采用SZ05-ADV型無線通訊模塊組建Zigbee無線網絡，結合嵌入式系統的軟硬件技術，完成終端節點的8路傳感器信號的數據采集。現場8路信號通過前端處理后，分別送入C8051F020的12位A/D轉換器進行轉換。經過精確處理、存儲后的現場數據，通過Zigbee無線網絡傳送到上位機，系統可達到汽車試驗中無線測試的目的。 Abstract: This paper designs a wireless sensor network system for data acquisition with C8051F020 as core processors.The system used SZ05-ADV wireless communication module，set up a Zigbee wireless network， combined with hardware and software technologies of embedded systems，completed the end-node 8-locale sensor signal data acquisition.Eight locale signals were sent separately into the 12-bit ADC of C8051F020 for conversion through front treatment.After accurate processing and storage，the locale data was transmitted to the host computer through Zigbee wireless.The system achieves the purpose of wireless testing in vehicle trial.
標簽： C8051F020 Zigbee 汽車測試 系統設計
上傳時間： 2013-11-23
上傳用戶：dsgkjgkjg
Virtex-5, Spartan-DSP FPGAs Application Note This application note demonstrates how efficient implementations of Digital Up Converters(DUC) and Digital Down Converters (DDC) can be done by leveraging the Xilinx DSP IPportfolio for increased productivity and reduced time to development. Step-by-step instruction is given on how to perform system-level trade off analysis and develop the most efficient FPGA implementation, thus allowing engineers a flexible, low-cost and low-power alternative to ASSP technologies.
標簽： Spartan-DSP Virtex FPGAs Ap
上傳時間： 2013-10-23
上傳用戶：raron1989
中文版詳情瀏覽：http://www.elecfans.com/emb/fpga/20130715324029.html Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications. The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation. Some of the UltraScale architecture breakthroughs include: • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50% • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization • 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets • Greatly enhanced DSP and packet handling The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.
標簽： UltraScale Xilinx 架構
上傳時間： 2013-11-13
上傳用戶：瓦力瓦力hong
Introduction to Xilinx Packaging Electronic packages are interconnectable housings for semiconductor devices. The major functions of the electronic packages are to provide electrical interconnections between the IC and the board and to efficiently remove heat generated by the device. Feature sizes are constantly shrinking, resulting in increased number of transistors being packed into the device. Today's submicron technology is also enabling large-scale functional integration and system-on-a-chip solutions. In order to keep pace with these new advancements in silicon technologies, semiconductor packages have also evolved to provide improved device functionality and performance. Feature size at the device level is driving package feature sizes down to the design rules of the early transistors. To meet these demands, electronic packages must be flexible to address high pin counts, reduced pitch and form factor requirements. At the same time,packages must be reliable and cost effective.
上傳時間： 2013-10-22
上傳用戶：ztj182002
