Abstract: A digital RF modulator, an integrated solution that satisfies stringent DOCSIS RF-performancerequirements, takes advantage of modern technologies like high-performance wideband digital-to-analogconversion and CMOS technology scaling. This application note describes the concept and advantages ofa digital quadrature amplitude modulation (QAM) modulator that uses the direct-RF architecture to enablea cable access platform (CCAP) system.
Abstract: What can be simpler than designing with CMOS and BiCMOS? These technologies are very easy to use butthey still require careful design. This tutorial discusses the odd case of circuits that seem to work but exhibit somepeculiar behaviors—including burning the designer's fingers!
This application note is an overview discussion of theLinear Technology SPICE macromodel library. It assumeslittle if any prior knowledge of this software library or itshistory. However, it does assume familiarity with both theanalog simulation program SPICE (or one of its manyderivatives), and modern day op amps, including bipolar,JFET, and MOSFET amplifier technologies
以C8051F020為核心處理器，設(shè)計(jì)無線傳感器網(wǎng)絡(luò)數(shù)據(jù)采集系統(tǒng)。系統(tǒng)采用SZ05-ADV型無線通訊模塊組建Zigbee無線網(wǎng)絡(luò)，結(jié)合嵌入式系統(tǒng)的軟硬件技術(shù)，完成終端節(jié)點(diǎn)的8路傳感器信號(hào)的數(shù)據(jù)采集。現(xiàn)場8路信號(hào)通過前端處理后，分別送入C8051F020的12位A/D轉(zhuǎn)換器進(jìn)行轉(zhuǎn)換。經(jīng)過精確處理、存儲(chǔ)后的現(xiàn)場數(shù)據(jù)，通過Zigbee無線網(wǎng)絡(luò)傳送到上位機(jī)，系統(tǒng)可達(dá)到汽車試驗(yàn)中無線測(cè)試的目的。
Abstract:
This paper designs a wireless sensor network system for data acquisition with C8051F020 as core processors.The system used SZ05-ADV wireless communication module，set up a Zigbee wireless network， combined with hardware and software technologies of embedded systems，completed the end-node 8-locale sensor signal data acquisition.Eight locale signals were sent separately into the 12-bit ADC of C8051F020 for conversion through front treatment.After accurate processing and storage，the locale data was transmitted to the host computer through Zigbee wireless.The system achieves the purpose of wireless testing in vehicle trial.
Virtex-5, Spartan-DSP FPGAs Application Note
This application note demonstrates how efficient implementations of Digital Up Converters(DUC) and Digital Down Converters (DDC) can be done by leveraging the Xilinx DSP IPportfolio for increased productivity and reduced time to development. Step-by-step instruction is given on how to perform system-level trade off analysis and develop the most efficient FPGA implementation, thus allowing engineers a flexible, low-cost and low-power alternative to ASSP technologies.
中文版詳情瀏覽：http://www.elecfans.com/emb/fpga/20130715324029.html
Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture
The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications.
The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation.
Some of the UltraScale architecture breakthroughs include:
• Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50%
• Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability
• Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization
• 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard
• Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets
• Greatly enhanced DSP and packet handling
The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.
Introduction to Xilinx Packaging Electronic packages are interconnectable housings for semiconductor devices. The major functions of the electronic packages are to provide electrical interconnections between the IC and the board and to efficiently remove heat generated by the device. Feature sizes are constantly shrinking, resulting in increased number of transistors being packed into the device. Today's submicron technology is also enabling large-scale functional integration and system-on-a-chip solutions. In order to keep pace with these new advancements in silicon technologies, semiconductor packages have also evolved to provide improved device functionality and performance. Feature size at the device level is driving package feature sizes down to the design rules of the early transistors. To meet these demands, electronic packages must be flexible to address high pin counts, reduced pitch and form factor requirements. At the same time,packages must be reliable and cost effective.
