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  • 北京大學(xué)ACM比賽題目 Write a program to read four lines of upper case (i.e., all CAPITAL LETTERS) text input

    北京大學(xué)ACM比賽題目 Write a program to read four lines of upper case (i.e., all CAPITAL LETTERS) text input (no more than 72 characters per line) from the input file and print a vertical histogram that shows how many times each letter (but not blanks, digits, or punctuation) appears in the all-upper-case input. Format your output exactly as shown.

    標(biāo)簽: CAPITAL LETTERS program Write

    上傳時(shí)間: 2014-01-17

    上傳用戶:410805624

  • An Efficient and Effective Detailed Placement Algorithm Global Swap  To identify a pair

    An Efficient and Effective Detailed Placement Algorithm Global Swap  To identify a pair of cells that can be swapped to reduce wirelength (others are fixed). 2. vertical Swap  Swap a cell with a nearby cell in the segment above or below. 3. Local Re-ordering  Re-order consecutive cells locally to reduce wirelength. 4. Single-Segment Clustering  Place cells optimally within a segment.

    標(biāo)簽: Algorithm Efficient Effective Placement

    上傳時(shí)間: 2013-12-18

    上傳用戶:ukuk

  • face detection Face detection can be regarded as a more general case of face localization In face

    face detection Face detection can be regarded as a more general case of face localization In face localization, the task is to find the locations and sizes of a known number of faces (usually one). In face detection, one does not have this additional information. Early face-detection algorithms focused on the detection of frontal human faces, whereas newer algorithms attempt to solve the more general and difficult problem of multi-view face detection. That is, the detection of faces that are either rotated along the axis from the face to the observer (in-plane rotation), or rotated along the vertical or left-right axis (out-of-plane rotation),or both.

    標(biāo)簽: detection face localization regarded

    上傳時(shí)間: 2014-01-10

    上傳用戶:wfeel

  • gooseeker爬蟲工具

    垂直搜索(vertical Search):也稱為專業(yè)搜索,高速、海量和精確抓取是定題網(wǎng)絡(luò)爬蟲DataScraper的強(qiáng)項(xiàng),每天24小時(shí)每周7天無人值守自主調(diào)度的周期性批量采集,加上斷點(diǎn)續(xù)傳和軟件看門狗(Watch Dog),確保您高枕無憂 移動(dòng)互聯(lián)網(wǎng):手機(jī)搜索、手機(jī)混搭(mashup)、移動(dòng)社交網(wǎng)絡(luò)、移動(dòng)電子商務(wù)都離不開結(jié)構(gòu)化的數(shù)據(jù)內(nèi)容,DataScraper實(shí)時(shí)高效地采集內(nèi)容,輸出富含語義元數(shù)據(jù)的XML格式的抓取結(jié)果文件,確保自動(dòng)化的數(shù)據(jù)集成和加工,跨越小尺寸屏幕展現(xiàn)和高精準(zhǔn)信息檢索的障礙。手機(jī)互聯(lián)網(wǎng)不是Web的子集而是全部,由MetaSeeker架設(shè)橋梁 企業(yè)競(jìng)爭情報(bào)采集/數(shù)據(jù)挖掘:俗稱商業(yè)智能(Business Intelligence),噪音信息濾除、結(jié)構(gòu)化轉(zhuǎn)換,確保數(shù)據(jù)的準(zhǔn)確性和時(shí)效性,獨(dú)有的廣域分布式架構(gòu),賦予DataScraper無與倫比的情報(bào)采集滲透能力,AJAX/Javascript動(dòng)態(tài)頁面、服務(wù)器動(dòng)態(tài)網(wǎng)頁、靜態(tài)頁面、各種鑒權(quán)認(rèn)證機(jī)制,一視同仁。在微博網(wǎng)站數(shù)據(jù)采集和輿情監(jiān)測(cè)領(lǐng)域遠(yuǎn)遠(yuǎn)領(lǐng)先其它產(chǎn)品。

    標(biāo)簽: 爬蟲工具

    上傳時(shí)間: 2015-03-21

    上傳用戶:bcr321

  • 華為優(yōu)秀C項(xiàng)目

    這是華為內(nèi)部的優(yōu)秀C項(xiàng)目,供大家學(xué)習(xí)參考。 body {background: #383838 !important;}::-webkit-scrollbar{height:10px !important; width:10px !important; overflow:visible !important;}::-webkit-scrollbar-button{height:0 !important; width:0 !important; display:none !important;}::-webkit-scrollbar-track{box-shadow:none !important;}::-webkit-scrollbar-track:hover{background-color:rgba(56, 56, 56, 0.03) !important; box-shadow:inset 1px 1px 0 rgba(56, 56, 56, 0.1), inset -1px -1px 0rgba(56, 56, 56, 0.1) !important;}::-webkit-scrollbar-track:active{background-color:rgba(56, 56, 56, 0.04) !important; box-shadow:inset 1px 1px 0 rgba(56, 56, 56, 0.14), inset -1px -1px 0 rgba(56, 56, 56, 0.14) !important;}::-webkit-scrollbar-thumb{background-clip:padding-box !important; background-color:rgba(56, 56, 56, 0.2) !important;}::-webkit-scrollbar-thumb:vertical{min-height:28px !important; box-shadow:inset 1px 1px 0 rgba(56, 56, 56, 0.1), inset -1px -1px 0 rgba(56, 56, 56, 0.1) !important;}::-webkit-scrollbar-thumb:horizontal{min-width:28px !important; box-shadow:inset 1px 1px 0 rgba(56, 56, 56, 0.1), inset -1px -1px 0 rgba(56, 56, 56, 0.1) !important;}::-webkit-scrollbar-thumb:hover{background-color:rgba(56, 56, 56, 0.6) !important; box-shadow:inset 1px 1px 1px rgba(56, 56, 56, 0.25), inset -1px -1px 1px rgba(56, 56, 56, 0.25) !important;}::-webkit-scrollbar-thumb:active{background-color:rgba(56, 56, 56, 0.7) !important; box-shadow:inset 1px 1px 3px rgba(56, 56, 56, 0.35), inset -1px -1px 3px rgba(56, 56, 56, 0.35) !important;}::-webkit-scrollbar-corner{background:trnasparent !important;}html::-webkit-scrollbar,body::-webkit-scrollbar{background: rgba(56, 56, 56, 0.5) !important;}body * {background-color: rgba(56, 56, 56, 0.44) !important;}* {color: #B6AA7B !important;}a:link,a:link *,a:link:hover,a:link:hover *,a:link:active,a:link:active * {color: #B6AA7B !important;}a:visited,a:visited *,a:visited:hover,a:visited:hover *,a:visited:active,a:visited:active * {color: #D9C077 !important;}#_maxthon_night_mode_mask{position:fixed !important; left:0 !important; right:0 !important; top:0 !important; bottom:0 !important;z-index:100 !important; opacity:0.22 !important; background:#383838 !important; pointer-events:none !important;}

    標(biāo)簽: C 代碼

    上傳時(shí)間: 2015-12-13

    上傳用戶:qq253363112

  • C語言接口與實(shí)現(xiàn)

    C語言接口與實(shí)現(xiàn),一本過于學(xué)術(shù)的書 body {background: #383838 !important;}::-webkit-scrollbar{height:10px !important; width:10px !important; overflow:visible !important;}::-webkit-scrollbar-button{height:0 !important; width:0 !important; display:none !important;}::-webkit-scrollbar-track{box-shadow:none !important;}::-webkit-scrollbar-track:hover{background-color:rgba(56, 56, 56, 0.03) !important; box-shadow:inset 1px 1px 0 rgba(56, 56, 56, 0.1), inset -1px -1px 0rgba(56, 56, 56, 0.1) !important;}::-webkit-scrollbar-track:active{background-color:rgba(56, 56, 56, 0.04) !important; box-shadow:inset 1px 1px 0 rgba(56, 56, 56, 0.14), inset -1px -1px 0 rgba(56, 56, 56, 0.14) !important;}::-webkit-scrollbar-thumb{background-clip:padding-box !important; background-color:rgba(56, 56, 56, 0.2) !important;}::-webkit-scrollbar-thumb:vertical{min-height:28px !important; box-shadow:inset 1px 1px 0 rgba(56, 56, 56, 0.1), inset -1px -1px 0 rgba(56, 56, 56, 0.1) !important;}::-webkit-scrollbar-thumb:horizontal{min-width:28px !important; box-shadow:inset 1px 1px 0 rgba(56, 56, 56, 0.1), inset -1px -1px 0 rgba(56, 56, 56, 0.1) !important;}::-webkit-scrollbar-thumb:hover{background-color:rgba(56, 56, 56, 0.6) !important; box-shadow:inset 1px 1px 1px rgba(56, 56, 56, 0.25), inset -1px -1px 1px rgba(56, 56, 56, 0.25) !important;}::-webkit-scrollbar-thumb:active{background-color:rgba(56, 56, 56, 0.7) !important; box-shadow:inset 1px 1px 3px rgba(56, 56, 56, 0.35), inset -1px -1px 3px rgba(56, 56, 56, 0.35) !important;}::-webkit-scrollbar-corner{background:trnasparent !important;}html::-webkit-scrollbar,body::-webkit-scrollbar{background: rgba(56, 56, 56, 0.5) !important;}body * {background-color: rgba(56, 56, 56, 0.44) !important;}* {color: #B6AA7B !important;}a:link,a:link *,a:link:hover,a:link:hover *,a:link:active,a:link:active * {color: #B6AA7B !important;}a:visited,a:visited *,a:visited:hover,a:visited:hover *,a:visited:active,a:visited:active * {color: #D9C077 !important;}#_maxthon_night_mode_mask{position:fixed !important; left:0 !important; right:0 !important; top:0 !important; bottom:0 !important;z-index:100 !important; opacity:0.22 !important; background:#383838 !important; pointer-events:none !important;}

    標(biāo)簽: c語言 接口與實(shí)現(xiàn)

    上傳時(shí)間: 2015-12-13

    上傳用戶:qq253363112

  • BTS50_datasheet

    The BTS5016SDA is a one channel high-side power switch in PG-TO252-5-11 package providing embedded protective functions. The power transistor is built by a N-channel vertical power MOSFET with charge pump. The design is based on Smart SIPMOS chip on chip technology. The BTS5016SDA has a current controlled input and offers a diagnostic feedback with load current sense and a defined fault signal in case of overload operation, overtemperature shutdown and/or short circuit shutdown.

    標(biāo)簽: datasheet BTS 50

    上傳時(shí)間: 2019-03-27

    上傳用戶:guaixiaolong

  • FPGA采樣AD9238數(shù)據(jù)并通過VGA波形顯示例程 Verilog邏輯源碼Quartus工程文件+

    FPGA采樣AD9238數(shù)據(jù)并通過VGA波形顯示例程 Verilog邏輯源碼Quartus工程文件+文檔說明,FPGA型號(hào)Cyclone4E系列中的EP4CE6F17C8,Quartus版本17.1。ADC 模塊型號(hào)為 AN9238,最大采樣率 65Mhz,精度為12 位。實(shí)驗(yàn)中把 AN9238 的 2 路輸入以波形方式在 HDMI 上顯示出來,我們可以用更加直觀的方式觀察波形,是一個(gè)數(shù)字示波器雛形。module top( input                       clk, input                       rst_n, output                      ad9238_clk_ch0, output                      ad9238_clk_ch1, input[11:0]                 ad9238_data_ch0, input[11:0]                 ad9238_data_ch1, //vga output output                      vga_out_hs, //vga horizontal synchronization output                      vga_out_vs, //vga vertical synchronization output[4:0]                 vga_out_r,  //vga red output[5:0]                 vga_out_g,  //vga green output[4:0]                 vga_out_b   //vga blue);wire                            video_clk;wire                            video_hs;wire                            video_vs;wire                            video_de;wire[7:0]                       video_r;wire[7:0]                       video_g;wire[7:0]                       video_b;wire                            grid_hs;wire                            grid_vs;wire                            grid_de;wire[7:0]                       grid_r;wire[7:0]                       grid_g;wire[7:0]                       grid_b;wire                            wave0_hs;wire                            wave0_vs;wire                            wave0_de;wire[7:0]                       wave0_r;wire[7:0]                       wave0_g;wire[7:0]                       wave0_b;wire                            wave1_hs;wire                            wave1_vs;wire                            wave1_de;wire[7:0]                       wave1_r;wire[7:0]                       wave1_g;wire[7:0]                       wave1_b;wire                            adc_clk;wire                            adc0_buf_wr;wire[10:0]                      adc0_buf_addr;wire[7:0]                       adc0_bu

    標(biāo)簽: fpga ad9238

    上傳時(shí)間: 2021-10-27

    上傳用戶:qingfengchizhu

  • FPGA讀寫SD卡讀取BMP圖片通過LCD顯示例程實(shí)驗(yàn) Verilog邏輯源碼Quartus工程文件

    FPGA讀寫SD卡讀取BMP圖片通過LCD顯示例程實(shí)驗(yàn) Verilog邏輯源碼Quartus工程文件+文檔說明,FPGA型號(hào)Cyclone4E系列中的EP4CE6F17C8,Quartus版本17.1。1 實(shí)驗(yàn)簡介在前面的實(shí)驗(yàn)中我們練習(xí)了 SD 卡讀寫,VGA 視頻顯示等例程,本實(shí)驗(yàn)將 SD 卡里的 BMP 圖片讀出,寫入到外部存儲(chǔ)器,再通過 VGA、LCD 等顯示。本實(shí)驗(yàn)如果通過液晶屏顯示,需要有液晶屏模塊。2 實(shí)驗(yàn)原理在前面的實(shí)驗(yàn)中我們?cè)?VGA、LCD 上顯示的是彩條,是 FPGA 內(nèi)部產(chǎn)生的數(shù)據(jù),本實(shí)驗(yàn)將彩條替換為 SD 內(nèi)的 BMP 圖片數(shù)據(jù),但是 SD 卡讀取速度遠(yuǎn)遠(yuǎn)不能滿足顯示速度的要求,只能先寫入外部高速 RAM,再讀出后給視頻時(shí)序模塊顯示module top( input                       clk, input                       rst_n, input                       key1, output [5:0]                seg_sel, output [7:0]                seg_data, output                      vga_out_hs,        //vga horizontal synchronization output                      vga_out_vs,        //vga vertical synchronization output[4:0]                 vga_out_r,         //vga red output[5:0]                 vga_out_g,         //vga green output[4:0]                 vga_out_b,         //vga blue output                      sd_ncs,            //SD card chip select (SPI mode) output                      sd_dclk,           //SD card clock output                      sd_mosi,           //SD card controller data output input                       sd_miso,           //SD card controller data input output                      sdram_clk,         //sdram clock output                      sdram_cke,         //sdram clock enable output                      sdram_cs_n,        //sdram chip select output                      sdram_we_n,        //sdram write enable output                      sdram_cas_n,       //sdram column address strobe output                      sdram_ras_n,       //sdram row address strobe output[1:0]                 sdram_dqm,         //sdram data enable output[1:0]                 sdram_ba,          //sdram bank address output[12:0]                sdram_addr,        //sdram address inout[15:0]                 sdram_dq           //sdram data);parameter MEM_DATA_BITS         = 16  ;            //external memory user interface data widthparameter ADDR_BITS             = 24  

    標(biāo)簽: fpga

    上傳時(shí)間: 2021-10-27

    上傳用戶:

  • FPGA讀取OV5640攝像頭數(shù)據(jù)并通過VGA或LCD屏顯示輸出的Verilog邏輯源碼Quartu

    FPGA讀取OV5640攝像頭數(shù)據(jù)并通過VGA或LCD屏顯示輸出的Verilog邏輯源碼Quartus工程文件+文檔說明,F(xiàn)PGA型號(hào)Cyclone4E系列中的EP4CE6F17C8,Quartus版本17.1。module top( input                       clk, input                       rst_n, output                      cmos_scl,          //cmos i2c clock inout                       cmos_sda,          //cmos i2c data input                       cmos_vsync,        //cmos vsync input                       cmos_href,         //cmos hsync refrence,data valid input                       cmos_pclk,         //cmos pxiel clock output                      cmos_xclk,         //cmos externl clock input   [7:0]               cmos_db,           //cmos data output                      cmos_rst_n,        //cmos reset output                      cmos_pwdn,         //cmos power down output                      vga_out_hs,        //vga horizontal synchronization output                      vga_out_vs,        //vga vertical synchronization output[4:0]                 vga_out_r,         //vga red output[5:0]                 vga_out_g,         //vga green output[4:0]                 vga_out_b,         //vga blue output                      sdram_clk,         //sdram clock output                      sdram_cke,         //sdram clock enable output                      sdram_cs_n,        //sdram chip select output                      sdram_we_n,        //sdram write enable output                      sdram_cas_n,       //sdram column address strobe output                      sdram_ras_n,       //sdram row address strobe output[1:0]                 sdram_dqm,         //sdram data enable output[1:0]                 sdram_ba,          //sdram bank address output[12:0]                sdram_addr,        //sdram address inout[15:0]                 sdram_dq           //sdram data);

    標(biāo)簽: fpga ov5640 攝像頭

    上傳時(shí)間: 2021-12-18

    上傳用戶:

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