一篇關于TCP-Vegas的文獻:Vegas is an implementation of TCP that achieves between 37 and 71％ better throughput on the Internet, with onefifth to one-half the losses, as compared to the implementation of TCP in the Reno distribution of BSD Unix. This paper motivates and Describes the three key techniques employed by Vegas, and presents the results of a comprehensive experimental performance study—using both simulations and measurements on the Internet—of the Vegas and Reno implementations of TCP.
Range imaging offers an inexpensive and accurate means for
digitizing the shape of three-dimensional objects. Because most
objects self occlude, no single range image suffices to describe the
entire object. We present a method for combining a collection of
range images into a single polygonal mesh that completely Describes
an object to the extent that it is visible from the outside.
There are several problems related to the properties of
the triangular mesh representation that Describes a
surface of an object. Sometimes, the surface is represented
just as a set of triangles without any other
information and the STL file format, which is used for
data exchanges, is a typicalexampl e of this situation.
Design patterns are elegant, adaptable, and reusable solutions to everyday software development problems. Programmers use design patterns to organize objects in programs, making them easier to write and modify. C# Design Patterns: A Tutorial is a practical guide to writing C# programs using the most common patterns.
This tutorial begins with clear and concise introductions to C#, object-oriented programming and inheritance, and UML diagrams. Each chapter that follows Describes one of twenty-three design patterns, recommends when to use it, and explains the impact that it will have on the larger design. The use of every pattern is demonstrated with simple example programs. These programs are illustrated with screen shots and UML diagrams displaying how the classes interact. Each of these programs is available on the companion CD-ROM and can be run, examined, edited, and applied.
DDR SDRAM控制器的VHDL源代碼，含詳細設計文檔。
The DDR, DCM, and SelectI/O™ features in the Virtex™ -II architecture make it the perfect
choice for implementing a controller of a Double Data Rate (DDR) SDRAM. The Digital Clock
Manager (DCM) provides the required Delay Locked Loop (DLL), Digital Phase Shift (DPS),
and Digital Frequency Synthesis (DFS) functions. This application note Describes a controller
design for a 16-bit DDR SDRAM. The application note and reference design are enhanced
versions of XAPP200 targeted to the Virtex-II series of FPGAs. At a clock rate of 133 MHz,
16-bit data changes at both clock edges. The reference design is fully synthesizable and
achieves 133 MHz performance with automatic place and route tools.
Bootloading the TMS320VC5506/C5507/C5509 A digital signal processor (DSP)
through the on-chip universal serial bus (USB) peripheral is part of the standard
bootloader provided on the device. This document Describes the procedures for
physically connecting the DSP to a USB host, invoking the USB bootloader on the
DSP, generating the correct boot table file, and downloading the boot table from the
host to the DSP via USB.
The Software Engineering Institute’s (SEI) Capability Maturity Model (CMM) provides a well-known benchmark of software
process maturity. The CMM has become a popular vehicle for assessing the maturity of an organization’s software process in
many domains. This white paper Describes how the Rational Unified Process can support an organization that is trying to
achieve CMM Level-2, Repeatable, and Level-3, Defined, software process maturity levels.
A class--the basic building block of an object-oriented language such as Java--is a template that Describes the data and behavior associated with instances of that class. When you instantiate a class you create an object that looks and feels like other instances of the same class. The data associated with a class or object is stored in variables the behavior associated with a class or object is implemented with methods. Methods are similar to the functions or procedures in procedural languages such as C.
Advanced ASIC Chip Synthesis Using Synopsys Design Compiler. This second edition of this book Describes the advanced concepts and
techniques used towards ASIC chip synthesis, physical synthesis, formal
verification and static timing analysis, using the Synopsys suite of tools.
