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• VHDL Design of BCD to 7-segment decoder using PROM免費(fèi)下載

  資源簡(jiǎn)介：VHDL Design of BCD to 7-segment decoder using PROM

  標(biāo)簽： decoder segment Design using

  上傳時(shí)間： 2017-07-28

  上傳用戶：Amygdala

• this program will give the functionality of bcd to seven segment display免費(fèi)下載

  資源簡(jiǎn)介：this program will give the functionality of bcd to seven segment display

  標(biāo)簽： functionality program display segment

  上傳時(shí)間： 2017-06-02

  上傳用戶：er1219

• CONVERSOR BCD TO 7 segmentS DISPLAY免費(fèi)下載

  資源簡(jiǎn)介：CONVERSOR BCD TO 7 segmentS DISPLAY

  標(biāo)簽： CONVERSOR segmentS DISPLAY BCD

  上傳時(shí)間： 2014-01-16

  上傳用戶：Yukiseop

• 74LS47.pdf免費(fèi)下載

  資源簡(jiǎn)介：英文描述： BCD to 7-segment decoder/Driver with Open-Collector Outputs 中文描述： BCD碼到7段解碼器/驅(qū)動(dòng)器，集電極開路輸出

  標(biāo)簽： 74 47 LS

  上傳時(shí)間： 2013-07-14

  上傳用戶：m62383408

• this doc willl show you how to control GLCD of nokia6610 to display your imagine using microcontroll免費(fèi)下載

  資源簡(jiǎn)介：this doc willl show you how to control GLCD of nokia6610 to display your imagine using microcontroller

  標(biāo)簽： microcontroll control display imagine

  上傳時(shí)間： 2013-12-31

  上傳用戶：windwolf2000

• 74LS48.pdf免費(fèi)下載

  資源簡(jiǎn)介：英文描述： BCD-to-Seven-segment decoder Driver(Internal Pull-up outputs) 中文描述： BCD碼到七段解碼器驅(qū)動(dòng)程序（內(nèi)部上拉輸出）

  標(biāo)簽： 74 48 LS

  上傳時(shí)間： 2013-07-13

  上傳用戶：cc1015285075

• a simple implementation of a frequency meter with the BCD-counter and the 7-segment LED display免費(fèi)下載

  資源簡(jiǎn)介：a simple implementation of a frequency meter with the BCD-counter and the 7-segment LED display

  標(biāo)簽： implementation BCD-counter frequency the

  上傳時(shí)間： 2014-12-04

  上傳用戶：wkchong

• To increase simulation speed, ModelSim® can apply a variety of optimizations to your Design. Thes免費(fèi)下載

  資源簡(jiǎn)介：To increase simulation speed, ModelSim&reg can apply a variety of optimizations to your Design. These include, but are not limited to, mergingprocesses, pulling constants out of loops, clock suppression, and signal collapsing. You control t...

  標(biāo)簽： optimizations simulation ModelSim increase

  上傳時(shí)間： 2013-12-25

  上傳用戶：pkkkkp

• 一本很好的關(guān)于學(xué)習(xí)VHDL的書,Fundamentals of Digital Logic with VHDL Design,我的導(dǎo)師在教我VHDL時(shí)使用的教材.上傳的是書內(nèi)包含的所有的代碼.免費(fèi)下載

  資源簡(jiǎn)介：一本很好的關(guān)于學(xué)習(xí)VHDL的書,Fundamentals of Digital Logic with VHDL Design,我的導(dǎo)師在教我VHDL時(shí)使用的教材.上傳的是書內(nèi)包含的所有的代碼.

  標(biāo)簽： VHDL Fundamentals Digital Design

  上傳時(shí)間： 2016-01-28

  上傳用戶：戀天使569

• PCI vhdl for Fpga Designer to Design PCI IP免費(fèi)下載

  資源簡(jiǎn)介：PCI vhdl for Fpga Designer to Design PCI IP

  標(biāo)簽： PCI Designer Design Fpga

  上傳時(shí)間： 2016-03-06

  上傳用戶：lijianyu172

• This paper provides a rigorous comprehensive approach to the Design of the principal software algor免費(fèi)下載

  資源簡(jiǎn)介：This paper provides a rigorous comprehensive approach to the Design of the principal software algorithmsutilized inmodern-day strapdown inertial navigationsystems: integration of angular rate into attitude, acceleration transformation/int...

  標(biāo)簽： comprehensive principal the approach

  上傳時(shí)間： 2016-10-18

  上傳用戶：蠢蠢66

• 2_4 decoder that file contain vhdl code of decoder免費(fèi)下載

  資源簡(jiǎn)介：2_4 decoder that file contain vhdl code of decoder

  標(biāo)簽： decoder contain code that

  上傳時(shí)間： 2013-11-27

  上傳用戶：cooran

• This is 7-segment LED contoler in vhdl免費(fèi)下載

  資源簡(jiǎn)介：This is 7-segment LED contoler in vhdl

  標(biāo)簽： contoler segment This vhdl

  上傳時(shí)間： 2013-12-30

  上傳用戶：123456wh

• This project shows the temperature on a three digit 7-segment display, it measures the temperature f免費(fèi)下載

  資源簡(jiǎn)介：This project shows the temperature on a three digit 7-segment display, it measures the temperature from -9.5 to 99 degrees Celcius in 0.5 C steps, or from 0 to 210 degrees Fahrenheit in 1.0 degrees steps. Because of the LED display the temp...

  標(biāo)簽： temperature the measures project

  上傳時(shí)間： 2017-04-16

  上傳用戶：xuanjie

• EMC/EMI Design guidelines which would be of help to embedded Designers . The are the basic ideas reg免費(fèi)下載

  資源簡(jiǎn)介：EMC/EMI Design guidelines which would be of help to embedded Designers . The are the basic ideas regarding EMI/EMC

  標(biāo)簽： guidelines Designers embedded Design

  上傳時(shí)間： 2017-05-06

  上傳用戶：xauthu

• Interfacing AVR to LED, Tact switch+7-segment, Matrix Keypad, HD44780 Character LCD and LED dot matr免費(fèi)下載

  資源簡(jiǎn)介：Interfacing AVR to LED, Tact switch+7-segment, Matrix Keypad, HD44780 Character LCD and LED dot matrix. Compiler: CodeVisionAVR. Proteus simulation included.

  標(biāo)簽： Interfacing Character LED segment

  上傳時(shí)間： 2017-09-10

  上傳用戶：dongqiangqiang

• cledlabel component let you add 7 segment edit box to your application. I added floatingpointformat免費(fèi)下載

  資源簡(jiǎn)介：cledlabel component let you add 7 segment edit box to your application. I added floatingpointformat function that let you add float data to the screen

  標(biāo)簽： floatingpointformat application cledlabel component

  上傳時(shí)間： 2017-09-17

  上傳用戶：許小華

• DSPack is a set of Components and class to write Multimedia Applications using MS Direct Show and Di免費(fèi)下載

  資源簡(jiǎn)介：DSPack is a set of Components and class to write Multimedia Applications using MS Direct Show and DirectX technologies. DSPack is Designed to work with DirectX 9 on Win9X, ME, 2000, and Windows XP operating systems. Now VMR (Video Mixing Re...

  標(biāo)簽： Applications Components Multimedia and

  上傳時(shí)間： 2015-07-20

  上傳用戶：hanli8870

• Designing the mode mini manual provided the software Design of 23 kinds of typical models mode, the免費(fèi)下載

  資源簡(jiǎn)介：Designing the mode mini manual provided the software Design of 23 kinds of typical models mode, the in aid of procedure member was better to develop procedure.

  標(biāo)簽： the mode Designing provided

  上傳時(shí)間： 2014-01-19

  上傳用戶：bruce5996

• 關(guān)于FPGA流水線設(shè)計(jì)的論文 This work investigates the use of very deep pipelines for implementing circuits in免費(fèi)下載

  資源簡(jiǎn)介：關(guān)于FPGA流水線設(shè)計(jì)的論文 This work investigates the use of very deep pipelines for implementing circuits in FPGAs, where each pipeline stage is limited to a single FPGA logic element (LE). The architecture and VHDL Design of a parameter...

  標(biāo)簽： investigates implementing pipelines circuits

  上傳時(shí)間： 2015-07-26

  上傳用戶：CHINA526

• initial working phase of the Design of said editor, featuring multicasting, advanced linux keyboard免費(fèi)下載

  資源簡(jiǎn)介：initial working phase of the Design of said editor, featuring multicasting, advanced linux keyboard handling, sub-hierarchical expansion, and multiple cursors (similar to the concept found in moonedit). The author respectfully requests y...

  標(biāo)簽： multicasting featuring advanced keyboard

  上傳時(shí)間： 2015-08-27

  上傳用戶：invtnewer

• This leon3 Design is tailored to the Altera NiosII Startix2 Development board, with 16-bit DDR SDR免費(fèi)下載

  資源簡(jiǎn)介：This leon3 Design is tailored to the Altera NiosII Startix2 Development board, with 16-bit DDR SDRAM and 2 Mbyte of SSRAM. As of this time, the DDR interface only works up to 120 MHz. At 130, DDR data can be read but not written. ...

  標(biāo)簽： Development Startix2 tailored Altera

  上傳時(shí)間： 2014-01-19

  上傳用戶：chongcongying

• This application report describes the use of Timer_A3 to decode RC5 and SIRC TV IR remote control si免費(fèi)下載

  資源簡(jiǎn)介：This application report describes the use of Timer_A3 to decode RC5 and SIRC TV IR remote control signals. The decoder described in this report is interrupt-driven and operates a background function using specific features the Timer_A3. Onl...

  標(biāo)簽： application describes Timer_A control

  上傳時(shí)間： 2014-01-01

  上傳用戶：qq21508895

• This paper investigates the Design of joint frequency offset and carrier phase estimation of a mult免費(fèi)下載

  資源簡(jiǎn)介：This paper investigates the Design of joint frequency offset and carrier phase estimation of a multi-frequency time division multiple access (MF-TDMA) demodulator that is applied to a digital video broadcasting—return channel system via...

  標(biāo)簽： investigates estimation frequency carrier

  上傳時(shí)間： 2015-12-30

  上傳用戶：ls530720646

• Design PATTERNS JAVA COMPANION Design patterns began to be recognized more formally in the early 1免費(fèi)下載

  資源簡(jiǎn)介：Design PATTERNS JAVA COMPANION Design patterns began to be recognized more formally in the early 1990s by Helm (1990) and Erich Gamma (1992), who described patterns incorporated in the GUI application framework, ET++. The culmination of ...

  標(biāo)簽： recognized COMPANION PATTERNS patterns

  上傳時(shí)間： 2016-02-27

  上傳用戶：大三三

• THIS Design IS PROVIDED TO YOU "AS IS". XILINX MAKES AND YOU RECEIVE NO WARRANTIES OR CONDITIONS, EX免費(fèi)下載

  資源簡(jiǎn)介：THIS Design IS PROVIDED TO YOU "AS IS". XILINX MAKES AND YOU RECEIVE NO WARRANTIES OR CONDITIONS, EXPRESS, IMPLIED, STATUTORY OR OTHERWISE, AND XILINX SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, OR FI...

  標(biāo)簽： CONDITIONS WARRANTIES YOU PROVIDED

  上傳時(shí)間： 2016-03-21

  上傳用戶：1427796291

• Design of Integrated Circuits for Optical Communications deals with the Design of high-speed integra免費(fèi)下載

  資源簡(jiǎn)介：Design of Integrated Circuits for Optical Communications deals with the Design of high-speed integrated circuits for optical communication systems. Written for both students and practicing engineers, the book systematically takes the reader...

  標(biāo)簽： Communications Integrated high-speed Circuits

  上傳時(shí)間： 2013-12-21

  上傳用戶：zhouchang199

• The Window Design Method The basic idea behind the Design of linear-phase FIR filters using the win免費(fèi)下載

  資源簡(jiǎn)介：The Window Design Method The basic idea behind the Design of linear-phase FIR filters using the window method is to choose a proper ideal frequency-selective filter [which always has a noncausal, infinite duration impulse response] and t...

  標(biāo)簽： linear-phase The the filters

  上傳時(shí)間： 2017-03-20

  上傳用戶：PresidentHuang

• This paper will discuss the Design of an asynchronous FIFO,Asynchronous FIFOs are widely used in the免費(fèi)下載

  資源簡(jiǎn)介：This paper will discuss the Design of an asynchronous FIFO,Asynchronous FIFOs are widely used in the computer networking industry to receive data at a particular frequency and transmit them at another frequency. An asynchronous FIFO has t...

  標(biāo)簽： Asynchronous asynchronous the discuss

  上傳時(shí)間： 2013-12-09

  上傳用戶：Thuan

• This application note describes the Design and implementation of a usb mass storage devic using a se免費(fèi)下載

  資源簡(jiǎn)介：This application note describes the Design and implementation of a usb mass storage devic using a secure digital card,which should prove useful to developers of usb mass storage solution.This application may be used as a stand-alone MSD or...

  標(biāo)簽： implementation application describes storage

  上傳時(shí)間： 2017-06-24

  上傳用戶：weiwolkt