針對51單片機系統中常用的A/D轉換器價格高、精度低的缺點，介紹TI公司的16 位的帶有I2C串行接口的A/D轉換器ADS1110的工作原理，給出ADS1110與AT89C51單片機系統的接口電路和軟件設計。實踐證明，ADS1110具有高性價比和實用性。 Abstract: According to the disadvantages of high expense and low accuracy of the general A/D converter used in MCS51 microchip system,the principle and working Process of a high accuracy 16-bit A/D conversion ADS1110 which has I2C bus and belongs to TI Company are proposed here as well as the interface of ADS1110 to AT89C51 and software list.It is proved to be high performance index and practicability.
上傳時間： 2013-11-21
上傳用戶：gyq
在介紹基于MSP430單片機的指紋保險柜工作原理的基礎上，從系統軟件設計的角度出發，詳細介紹了指紋保險柜軟件的總體分析過程、程序結構的設計以及代碼的編寫，給出了按鍵管理流程和部分源代碼。 Abstract: On basis of the operating principle of MSP430 microcontroller-based fingerprint safe,the general analyzing Process,program designing and code compiling of the fingerprint safe software are introduced mainly,and the key-press flows chart and some codes according to the system software designing are put forward.
上傳時間： 2014-12-27
上傳用戶：gaojiao1999
為了在工業生產及過程控制中準確測量溫度，設計了一種基于低功耗MSP430單片機的數字溫度計。整個系統通過單片機MSP430F1121A控制DS18B20讀取溫度，采用數碼管顯示，溫度傳感器DS18B20與單片機之間通過串口進行數據傳輸。MSP430系列單片機具有超低功耗，且外圍的整合性高，DS18B20只需一個端口即可實現數據通信，連接方便。通過多次實驗證明，該系統的測試結果與實際環境溫度一致，除了具有接口電路簡單、測量精度高、誤差小、可靠性高等特點外，其低成本、低功耗的特點使其擁有更廣闊的應用前景。 Abstract: In order to obtain accurate measuring temperature in industrial production and Process control， a digital thermometer based on MSP430 MCU is designed. The system uses MSP430F1121A MCU to control DS18B20， and gets the temperature data， which is displayed on the LED. The temperature sensor DS18B20 and MCU transmit data through serial communication. MSP430 series has ultra-low power and high integration， DS18B20 only needs one port to achieve data communication. Through many experimental results prove， this system is consistent with actual environment temperature. The system has characteristics of interface circuit simple， high measuring accuracy， minor error， high reliability， besides， the characteristics of low cost and low power make it having vaster application prospect.
上傳時間： 2013-10-16
上傳用戶：wettetw
本文介紹了基于AT89C52 單片機的自動水溫控制系統的設計及實現過程。該系統具有實時顯示、溫度測量、溫度設定并能根據設定值對環境溫度進行調節實現控溫的目的以及達到上下限溫度報警功能，控制算法是基于數字PID 算法。關鍵詞 ：PID AT89C52 脈寬調制 實時 Abstract ： This article describes AT89C52 single-chip microcomputer-basedautomatic water temperature control system design and implementation Process. Thesystem has real-time display, temperature measurement, temperature settings and theenvironment in accordance with the temperature settings adjusted to achieve thepurpose of temperature control and reach the upper and lower limits of temperaturealarm function, the control algorithm is based on the digital PID algorithm.Keyword: PID AT89C52 PWM real time
上傳時間： 2013-10-10
上傳用戶：歸海惜雪
匯編器在微處理器的驗證和應用中舉足輕重，如何設計通用的匯編器一直是研究的熱點之一。本文提出了一種開放式的匯編器系統設計思想，在匯編語言與機器語言間插入中間代碼CMDL（code mapping description language）語言，打破匯編語言與機器語言的直接映射關系，由此建立起一套描述匯編語言與機器語言的開放式映射體系。基于此開放式映射體系開發了一套匯編器系統，具有較高層次上的通用性和可移植性。【關鍵詞】指令集，CMDL，匯編器，開放式 Design of Retargetable Assembler System Liu Ling Feng Wen Nan Wang Ying Chun Jiang An Ping Ji Li Jiu IME of Peking University, 100871【摘要】An assembler plays a very important role in the field of microProcessor verifications and applications, thus how to build a retargetable assembler system has been a hotspot in this field for long time. This paper presents a new method about the retargetable assembler system design.It provides a kind of language CMDL, code mapping description language. During the Process of assembling, assembler languages are firstly translated to CMDL, and then mapped to the machine codes. In an other word, CMDL is inserted between assembler languages and machine codes during the translation procedure. As a medium code, CMDL has a lot of features, such as high extraction, strong descript capabilities. It can describe almost all attributes of assembler languages. By breaking the direct mapping relationship between assembler languages and machine codes, the complexities of machine codes are hided to the users, therefore, the new retargetable assembler system has higher retargetable level by converting the mapping from assembler languages and machine codes to assembler languages and CMDL, and implementationof it becomes easier. Based on the new mapping system structure, a retargetable assemblersystem is developed. It proved the whole system has good retargetability and implantability.【關鍵詞】instruction set, symbol table, assembler, lexical analysis, retargetability
上傳時間： 2013-10-10
上傳用戶：meiguiweishi
The main oscillator allows either a crystal or single-ended input clock signal. Cost-sensitiveapplications typically use an external crystal with the on-chip oscillator circuit since it is the mostcost-effective solution. It is also possible to use the internal oscillator to clock the device after theboot Process has completed.
標簽： Stellaris Clocking Options for
上傳時間： 2013-10-14
上傳用戶：pol123
基于PIC單片機的脈沖電源:設計了一種金屬凝固過程用脈沖電源。該電源采用PIC16F877作為主控芯片，實現對窄脈沖電流幅值的檢測，以及時電流脈沖幅值根據模糊PID算法進行閑環控制。使用結果表明：該電源的輸出脈沖波形良好，電流幅值穩定，滿足合金材料凝固過程的工藝要求且運行穩定可靠。關鍵詞：脈沖電源；PIC16F877單片機；模糊PID；閑環控制 Abstract：A kind of pulse power supply was designed which uses in the metal solidification Process ．．I11is power supply used PIC16F877 to take the master control chip reali on to the narrow pulse electric current peak-to-peak value examination，carried on the closed-loop control to the electric current pulse peak-to-peak value basis fuzzy PID algorithm．The use result indicated ，this power supply output se profile is good，and the electric current peak-to-p~k value is stable，It satisfies the alloy material solidification Process the technological requirement and movement stable reliable，Key words：p se po wer supply；PIC16F877single-chip microcontroller；f r PID；closed-loop control
上傳時間： 2013-10-27
上傳用戶：xcy122677
針對使用硬件描述語言進行設計存在的問題，提出一種基于FPGA并采用DSP Builder作為設計工具的數字信號處理器設計方法。并按照Matlab/Simulink/DSP Builder/QuartusⅡ設計流程，設計了一個12階FIR 低通數字濾波器，通過Quartus 時序仿真及嵌入式邏輯分析儀SignalTapⅡ硬件測試對設計進行了驗證。結果表明，所設計的FIR 濾波器功能正確，性能良好。 Abstract: Aiming at the problems in designing DSP using HDL，a method of designing DSP based on FPGA which using DSP Builder as designed tool is pointed out.A 12-order low-pass FIR digital filter was designed according to the Process of Matlab/Simulink/DSP Builder/QuartusⅡ, and the design was verified by the timing simulation based on QuartusⅡand practical test based on SignalTapⅡ. The result shows the designed filter is correct in function and good in performance.
上傳時間： 2013-11-17
上傳用戶：lo25643
中文版詳情瀏覽：http://www.elecfans.com/emb/fpga/20130715324029.html Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications. The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation. Some of the UltraScale architecture breakthroughs include: • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50% • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization • 3D IC integration makes it possible to build larger devices one Process generation ahead of the current industr y standard • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets • Greatly enhanced DSP and packet handling The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.
標簽： UltraScale Xilinx 架構
上傳時間： 2013-11-13
上傳用戶：瓦力瓦力hong
This white paper discusses how market trends, the need for increased productivity, and new legislation have accelerated the use of safety systems in industrial machinery. This TÜV-qualified FPGA design methodology is changing the paradigms of safety designs and will greatly reduce development effort, system complexity, and time to market. This allows FPGA users to design their own customized safety controllers and provides a significant competitive advantage over traditional microcontroller or ASIC-based designs. Introduction The basic motivation of deploying functional safety systems is to ensure safe operation as well as safe behavior in cases of failure. Examples of functional safety systems include train brakes, proximity sensors for hazardous areas around machines such as fast-moving robots, and distributed control systems in Process automation equipment such as those used in petrochemical plants. The International Electrotechnical Commission’s standard, IEC 61508: “Functional safety of electrical/electronic/programmable electronic safety-related systems,” is understood as the standard for designing safety systems for electrical, electronic, and programmable electronic (E/E/PE) equipment. This standard was developed in the mid-1980s and has been revised several times to cover the technical advances in various industries. In addition, derivative standards have been developed for specific markets and applications that prescribe the particular requirements on functional safety systems in these industry applications. Example applications include Process automation (IEC 61511), machine automation (IEC 62061), transportation (railway EN 50128), medical (IEC 62304), automotive (ISO 26262), power generation, distribution, and transportation. 圖Figure 1. Local Safety System
上傳時間： 2013-11-05
上傳用戶：維子哥哥
