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Virtex-5, Spartan-DSP FPGAs Application Note
This application note demonstrates how efficient implementations of Digital Up Converters(DUC) and Digital Down Converters (DDC) can be done by leveraging the Xilinx DSP IPportfolio for increased productivity and reduced time to development. Step-by-step instruction is given on how to perform system-level trade off analysis and develop the most efficient FPGA implementation, thus allowing engineers a flexible, low-cost and low-power alternative to ASSP technologies.
標簽：
Spartan-DSP
Virtex
FPGAs
Ap
上傳時間：
2013-10-23
上傳用戶：raron1989
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The HCS12X family is the successor to the HCS12family, with many additional features. One new feature isthe increased memory available to the CPU and themethods available to access it. This document focuses onthe improved memory map configuration.
標簽：
HCS
12X
12
存儲器
上傳時間：
2013-11-13
上傳用戶：王者A
-
中文版詳情瀏覽：http://www.elecfans.com/emb/fpga/20130715324029.html
Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture
The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications.
The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation.
Some of the UltraScale architecture breakthroughs include:
• Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50%
• Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability
• Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization
• 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard
• Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets
• Greatly enhanced DSP and packet handling
The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.
標簽：
UltraScale
Xilinx
架構
上傳時間：
2013-11-13
上傳用戶：瓦力瓦力hong
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This white paper discusses how market trends, the need for increased productivity, and new legislation have
accelerated the use of safety systems in industrial machinery. This TÜV-qualified FPGA design methodology is
changing the paradigms of safety designs and will greatly reduce development effort, system complexity, and time to
market. This allows FPGA users to design their own customized safety controllers and provides a significant
competitive advantage over traditional microcontroller or ASIC-based designs.
Introduction
The basic motivation of deploying functional safety systems is to ensure safe operation as well as safe behavior in
cases of failure. Examples of functional safety systems include train brakes, proximity sensors for hazardous areas
around machines such as fast-moving robots, and distributed control systems in process automation equipment such
as those used in petrochemical plants.
The International Electrotechnical Commission’s standard, IEC 61508: “Functional safety of
electrical/electronic/programmable electronic safety-related systems,” is understood as the standard for designing
safety systems for electrical, electronic, and programmable electronic (E/E/PE) equipment. This standard was
developed in the mid-1980s and has been revised several times to cover the technical advances in various industries.
In addition, derivative standards have been developed for specific markets and applications that prescribe the
particular requirements on functional safety systems in these industry applications. Example applications include
process automation (IEC 61511), machine automation (IEC 62061), transportation (railway EN 50128), medical (IEC
62304), automotive (ISO 26262), power generation, distribution, and transportation.
圖Figure 1. Local Safety System
標簽：
FPGA
安全系統
上傳時間：
2013-11-05
上傳用戶：維子哥哥
-
Introduction to Xilinx Packaging Electronic packages are interconnectable housings for semiconductor devices. The major functions of the electronic packages are to provide electrical interconnections between the IC and the board and to efficiently remove heat generated by the device. Feature sizes are constantly shrinking, resulting in increased number of transistors being packed into the device. Today's submicron technology is also enabling large-scale functional integration and system-on-a-chip solutions. In order to keep pace with these new advancements in silicon technologies, semiconductor packages have also evolved to provide improved device functionality and performance. Feature size at the device level is driving package feature sizes down to the design rules of the early transistors. To meet these demands, electronic packages must be flexible to address high pin counts, reduced pitch and form factor requirements. At the same time,packages must be reliable and cost effective.
標簽：
封裝
器件
用戶
賽靈思
上傳時間：
2013-10-22
上傳用戶：ztj182002
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Design techniques for electronic systems areconstantly changing. In industries at the heart of thedigital revolution, this change is especially acute.Functional integration, dramatic increases incomplexity, new standards and protocols, costconstraints, and increased time-to-market pressureshave bolstered both the design challenges and theopportunities to develop modern electronic systems.One trend driving these changes is the increasedintegration of core logic with previously discretefunctions to achieve higher performance and morecompact board designs.
標簽：
System
Xilinx
FPGA
151
上傳時間：
2014-12-28
上傳用戶：康郎
-
中文版詳情瀏覽：http://www.elecfans.com/emb/fpga/20130715324029.html
Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture
The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications.
The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation.
Some of the UltraScale architecture breakthroughs include:
• Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50%
• Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability
• Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization
• 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard
• Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets
• Greatly enhanced DSP and packet handling
The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.
標簽：
UltraScale
Xilinx
架構
上傳時間：
2013-11-21
上傳用戶：wxqman
-
This white paper discusses how market trends, the need for increased productivity, and new legislation have
accelerated the use of safety systems in industrial machinery. This TÜV-qualified FPGA design methodology is
changing the paradigms of safety designs and will greatly reduce development effort, system complexity, and time to
market. This allows FPGA users to design their own customized safety controllers and provides a significant
competitive advantage over traditional microcontroller or ASIC-based designs.
Introduction
The basic motivation of deploying functional safety systems is to ensure safe operation as well as safe behavior in
cases of failure. Examples of functional safety systems include train brakes, proximity sensors for hazardous areas
around machines such as fast-moving robots, and distributed control systems in process automation equipment such
as those used in petrochemical plants.
The International Electrotechnical Commission’s standard, IEC 61508: “Functional safety of
electrical/electronic/programmable electronic safety-related systems,” is understood as the standard for designing
safety systems for electrical, electronic, and programmable electronic (E/E/PE) equipment. This standard was
developed in the mid-1980s and has been revised several times to cover the technical advances in various industries.
In addition, derivative standards have been developed for specific markets and applications that prescribe the
particular requirements on functional safety systems in these industry applications. Example applications include
process automation (IEC 61511), machine automation (IEC 62061), transportation (railway EN 50128), medical (IEC
62304), automotive (ISO 26262), power generation, distribution, and transportation.
圖Figure 1. Local Safety System
標簽：
FPGA
安全系統
上傳時間：
2013-11-14
上傳用戶：zoudejile
-
Introduction to Xilinx Packaging Electronic packages are interconnectable housings for semiconductor devices. The major functions of the electronic packages are to provide electrical interconnections between the IC and the board and to efficiently remove heat generated by the device. Feature sizes are constantly shrinking, resulting in increased number of transistors being packed into the device. Today's submicron technology is also enabling large-scale functional integration and system-on-a-chip solutions. In order to keep pace with these new advancements in silicon technologies, semiconductor packages have also evolved to provide improved device functionality and performance. Feature size at the device level is driving package feature sizes down to the design rules of the early transistors. To meet these demands, electronic packages must be flexible to address high pin counts, reduced pitch and form factor requirements. At the same time,packages must be reliable and cost effective.
標簽：
封裝
器件
用戶
賽靈思
上傳時間：
2013-11-21
上傳用戶：不懂夜的黑
-
Design techniques for electronic systems areconstantly changing. In industries at the heart of thedigital revolution, this change is especially acute.Functional integration, dramatic increases incomplexity, new standards and protocols, costconstraints, and increased time-to-market pressureshave bolstered both the design challenges and theopportunities to develop modern electronic systems.One trend driving these changes is the increasedintegration of core logic with previously discretefunctions to achieve higher performance and morecompact board designs.
標簽：
System
Xilinx
FPGA
151
上傳時間：
2013-11-23
上傳用戶：kangqiaoyibie
