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Circuit

  • XAPP143-利用Verilog來創建CPLD設計

    This Application Note covers the basics of how to use Verilog as applied to ComplexProgrammable Logic Devices. Various combinational logic Circuit examples, such asmultiplexers, decoders, encoders, comparators and adders are provided. Synchronous logicCircuit examples, such as counters and state machines are also provided.

    標簽: Verilog XAPP CPLD 143

    上傳時間: 2013-11-11

    上傳用戶:y13567890

  • Creating Safe State Machines(Mentor)

      Finite state machines are widely used in digital Circuit designs. Generally, when designing a state machine using an HDL, the synthesis tools will optimize away all states that cannot be reached and generate a highly optimized Circuit. Sometimes, however, the optimization is not acceptable. For example, if the Circuit powers up in an invalid state, or the Circuit is in an extreme working environment and a glitch sends it into an undesired state, the Circuit may never get back to its normal operating condition.

    標簽: Creating Machines Mentor State

    上傳時間: 2013-11-02

    上傳用戶:xauthu

  • 基于CPLD的QDPSK調制解調電路設計

    為了在CDMA系統中更好地應用QDPSK數字調制方式,在分析四相相對移相(QDPSK)信號調制解調原理的基礎上,設計了一種QDPSK調制解調電路,它包括串并轉換、差分編碼、四相載波產生和選相、相干解調、差分譯碼和并串轉換電路。在MAX+PLUSⅡ軟件平臺上,進行了編譯和波形仿真。綜合后下載到復雜可編程邏輯器件EPM7128SLC84-15中,測試結果表明,調制電路能正確選相,解調電路輸出數據與QDPSK調制輸入數據完全一致,達到了預期的設計要求。 Abstract:  In order to realize the better application of digital modulation mode QDPSK in the CDMA system, a sort of QDPSK modulation-demodulation Circuit was designed based on the analysis of QDPSK signal modulation-demodulation principles. It included serial/parallel conversion Circuit, differential encoding Circuit, four-phase carrier wave produced and phase chosen Circuit, coherent demodulation Circuit, difference decoding Circuit and parallel/serial conversion Circuit. And it was compiled and simulated on the MAX+PLUSⅡ software platform,and downloaded into the CPLD of EPM7128SLC84-15.The test result shows that the modulation Circuit can exactly choose the phase,and the output data of the demodulator Circuit is the same as the input data of the QDPSK modulate. The Circuit achieves the prospective requirement of the design.

    標簽: QDPSK CPLD 調制解調 電路設計

    上傳時間: 2013-10-28

    上傳用戶:jyycc

  • 多層印制板設計基本要領

    【摘要】本文結合作者多年的印制板設計經驗,著重印制板的電氣性能,從印制板穩定性、可靠性方面,來討論多層印制板設計的基本要求。【關鍵詞】印制電路板;表面貼裝器件;高密度互連;通孔【Key words】Printed Circuit Board;Surface Mounting Device;High Density Interface;Via一.概述印制板(PCB-Printed Circuit Board)也叫印制電路板、印刷電路板。多層印制板,就是指兩層以上的印制板,它是由幾層絕緣基板上的連接導線和裝配焊接電子元件用的焊盤組成,既具有導通各層線路,又具有相互間絕緣的作用。隨著SMT(表面安裝技術)的不斷發展,以及新一代SMD(表面安裝器件)的不斷推出,如QFP、QFN、CSP、BGA(特別是MBGA),使電子產品更加智能化、小型化,因而推動了PCB工業技術的重大改革和進步。自1991年IBM公司首先成功開發出高密度多層板(SLC)以來,各國各大集團也相繼開發出各種各樣的高密度互連(HDI)微孔板。這些加工技術的迅猛發展,促使了PCB的設計已逐漸向多層、高密度布線的方向發展。多層印制板以其設計靈活、穩定可靠的電氣性能和優越的經濟性能,現已廣泛應用于電子產品的生產制造中。下面,作者以多年設計印制板的經驗,著重印制板的電氣性能,結合工藝要求,從印制板穩定性、可靠性方面,來談談多層制板設計的基本要領。

    標簽: 多層 印制板

    上傳時間: 2013-10-08

    上傳用戶:zhishenglu

  • 基于Verilog HDL設計的多功能數字鐘

    本文利用Verilog HDL 語言自頂向下的設計方法設計多功能數字鐘,突出了其作為硬件描述語言的良好的可讀性、可移植性和易理解等優點,并通過Altera QuartusⅡ 4.1 和ModelSim SE 6.0 完成綜合、仿真。此程序通過下載到FPGA 芯片后,可應用于實際的數字鐘顯示中。 關鍵詞:Verilog HDL;硬件描述語言;FPGA Abstract: In this paper, the process of designing multifunctional digital clock by the Verilog HDL top-down design method is presented, which has shown the readability, portability and easily understanding of Verilog HDL as a hard description language. Circuit synthesis and simulation are performed by Altera QuartusⅡ 4.1 and ModelSim SE 6.0. The program can be used in the truly digital clock display by downloading to the FPGA chip. Keywords: Verilog HDL;hardware description language;FPGA

    標簽: Verilog HDL 多功能 數字

    上傳時間: 2013-11-10

    上傳用戶:hz07104032

  • 開關電源EMI設計(英文版)

    Integrated EMI/Thermal Design forSwitching Power SuppliesWei ZhangThesis submitted to the Faculty of theVirginia Polytechnic Institute and State Universityin partial fulfillment of the requirements for the degree of Integrated EMI/Thermal Design forSwitching Power SuppliesWei Zhang(ABSTRACT)This work presents the modeling and analysis of EMI and thermal performancefor switch power supply by using the CAD tools. The methodology and design guidelinesare developed.By using a boost PFC Circuit as an example, an equivalent Circuit model is builtfor EMI noise prediction and analysis. The parasitic elements of Circuit layout andcomponents are extracted analytically or by using CAD tools. Based on the model, Circuitlayout and magnetic component design are modified to minimize Circuit EMI. EMI filtercan be designed at an early stage without prototype implementation.In the second part, thermal analyses are conducted for the Circuit by using thesoftware Flotherm, which includes the mechanism of conduction, convection andradiation. Thermal models are built for the components. Thermal performance of theCircuit and the temperature profile of components are predicted. Improved thermalmanagement and winding arrangement are investigated to reduce temperature.In the third part, several Circuit layouts and inductor design examples are checkedfrom both the EMI and thermal point of view. Insightful information is obtained.

    標簽: EMI 開關電源 英文

    上傳時間: 2013-11-16

    上傳用戶:萍水相逢

  • PCB電源設計經典資料

    |Introduction􀂄􀂄 Basic Concept􀂄􀂄 Tips to layout Power Circuit􀂄􀂄 Type of Power Circuit Basic Concept􀂄􀂄 Maximum Current calculation􀂄􀂄 Resistance of Copper􀂄􀂄 ideal power supply & noise􀂄􀂄 Capacitor & Inductor􀂄􀂄 Power consumption􀂄􀂄 Function of power Circuit

    標簽: PCB 電源設計

    上傳時間: 2013-12-10

    上傳用戶:JIEWENYU

  • pci e PCB設計規范

    This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.  

    標簽: pci PCB 設計規范

    上傳時間: 2014-01-24

    上傳用戶:s363994250

  • 阻抗匹配

    阻抗匹配  阻抗匹配(Impedance matching)是微波電子學里的一部分,主要用于傳輸線上,來達至所有高頻的微波信號皆能傳至負載點的目的,不會有信號反射回來源點,從而提升能源效益。  大體上,阻抗匹配有兩種,一種是透過改變阻抗力(lumped-Circuit matching),另一種則是調整傳輸線的波長(transmission line matching)。  要匹配一組線路,首先把負載點的阻抗值,除以傳輸線的特性阻抗值來歸一化,然后把數值劃在史密夫圖表上。  把電容或電感與負載串聯起來,即可增加或減少負載的阻抗值,在圖表上的點會沿著代表實數電阻的圓圈走動。如果把電容或電感接地,首先圖表上的點會以圖中心旋轉180度,然后才沿電阻圈走動,再沿中心旋轉180度。重覆以上方法直至電阻值變成1,即可直接把阻抗力變為零完成匹配。  由負載點至來源點加長傳輸線,在圖表上的圓點會沿著圖中心以逆時針方向走動,直至走到電阻值為1的圓圈上,即可加電容或電感把阻抗力調整為零,完成匹配.........

    標簽: 阻抗匹配

    上傳時間: 2013-10-20

    上傳用戶:ZOULIN58

  • 西門子建筑電器-電氣安裝技術部發行的各類產品樣本

    西門子建筑電器-電氣安裝技術部發行的各類產品樣本:小型斷路器、剩余電流保護斷路器和模數化產品(中/ 英文)Miniature Circuit-Breakers, Residual Current Operated Circuit-Breakers and Modular Devices (Chinese/English)低壓熔斷器系統(中/ 英文)Fuse System (Chinese/English)雷擊,過電壓-不再是問題(中文)Thunderstorms - no problem (Chinese)西門子建筑電器目錄(中文)Electrical Installation Technology Catalog (Chinese)終端配電保護產品(中文)5 IN 1 (Chinese)SIKUS 和 STAB UNIVERSAL 目錄(中文)SIKUS and STAB UNIVERSAL Catalogue (Chinese)SIKUS HC 目錄(中文)SIKUS HC Catalogue (Chinese)SentronTM 母線槽 (中文)SentronTM Busway System (Chinese)SentronTM 母線槽系統快速選型 (準備中) (中文)SentronTM Busway System quick selection (in preparing) (Chinese)建筑低壓配電一體化解決方案-住宅小區應用(中文)Building LV PD Solution (Chinese)西門子 DELTA vista“遠景”系列開關和插座價目表(中文)Delta vista Switch and Socket Pricelist (Chinese)instabus EIB 面向未來的樓宇智能控制系統(中文)instabus EIB (Chinese)instabus EIB 面向未來的樓宇智能控制系統技術手冊 (準備中) (中文)instabus EIB technical handbook (in preparing) (Chinese)西門子電氣安裝技術業績卓越(中/ 英文)ET Reference Manual (Chinese/English)

    標簽: 西門子 電器 樣本 電氣安裝

    上傳時間: 2013-11-23

    上傳用戶:瓦力瓦力hong

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